Microchip’s 25AA/25LC EEPROMs are data storage chips with a simple 3-wire interface. The 25AA/LC is an SPI version of the common 24AA/LC I2C EEPROM. It comes in capacities of 128bytes to 128kilobytes. We looked at the smallest, the 128byte 25AA010A.
There are Bus Pirate demonstrations for most types of serial EEPROMs. Check out our previous 1-wire (DS2431) and I2C (24LC1025) EEPROM posts.
Continue below to see our test circuit and a demonstration of the 25AA010 EEPROM. We used the Bus Pirate to play with this chip from our PC. For a limited time you can get your own Bus Pirate, fully assembled and shipped worldwide, for only $30.
25AA010A SPI EEPROM memory, 128bytes (Octopart search, $0.70). Datasheet (PDF).
The schematic above shows a simple test circuit that should work with any 25AA/25LC SPI EEPROM. It’s a good idea to use a 0.1uF decoupling capacitor (C1) on the power pin in a real circuit, but we didn’t use one for our demonstration. We also connected the write protect (WP) and hold (HOLD) pins to the supply voltage (V+) to disable these features.
| Bus Pirate | 25AA/LC (pin #) |
| CS | CS (1) |
| MISO | SO (2) |
| MOSI | SI (5) |
| CLK | SCK (6) |
| V+ | WP (3) |
| V+ | HOLD (7) |
| V+ (3.3volts) | VCC (8) |
| GND | GND (4) |
| Vpullup | VCC (8) |
We used our Bus Pirate universal serial interface to demonstrate this chip, but the command sequences will be the same for any setup. We connected the Bus Pirate to the 25AA010 as shown in the table above. We setup the Bus Pirate for SPI mode (M, 5) with normal outputs, and enabled the on-board power supply (capital ‘W’).
25AA parts work from 1.8volts to 5.5volts, 25LC parts have a 2.5volt minimum. We used a 3.3volt supply to power the chip, and interfaced it using the Bus Pirate’s normal 3.3volt pin outputs.
You could also power the chip from the Bus Pirate’s 5volt supply. Interface the chip at 5volts by choosing open drain pin type (HiZ) during the mode configuration, then hold the bus high with pull-up resistors connected to 5volts.
Interfacing
Page 7 of the datasheet has a complete list of interface commands. This demonstration shows the minimum operations needed to write and retrieve data.
SPI>[0b110] <–Bus Pirate command syntax
CS ENABLED <– Chip select enabled (0 volts)
WRITE: 0x06 <–Write enable command
CS DISABLED <– Chip select disabled (V+)
SPI>
A valid write enable command is required before data can be saved to the EEPROM. Enable the chip select signal to wake the chip ([), send the write enable command (0b110 binary, or 0x06 in hexadecimal), and then disable chip select (]).
SPI>[0b10 0 1 2 3 4 5] <– Bus Pirate command syntax
CS ENABLED <– Chip select enabled (0volts)
WRITE: 0x02 <– Write data command
WRITE: 0x00 <– Write address (*sometimes 2 bytes)
WRITE: 0x01 <– Data to write (5 bytes)
WRITE: 0x02
WRITE: 0x03
WRITE: 0x04
WRITE: 0x05
CS DISABLED <– Chip select disabled (V+)
SPI>
Store data in the EEPROM by sending the write command (0x02), the address to start writing (0x00), and the bytes to write (the values 1 to 5).
Up to 16 bytes can be written in a single operation. All writes must be on the same page of memory, see datasheet page 6 for details. EEPROMs larger than 256 bytes use 16 bit (2 byte) addresses.
SPI>[0b11 0 r:5] <– Bus Pirate command syntax
CS ENABLED <– Chip select enabled (0volts)
WRITE: 0x03 <–Read data command
WRITE: 0x00 <–Read address (*sometimes 2 bytes)
BULK READ 0x05 BYTES:
0x01 0x02 0x03 0x04 0x05 <– The data we wrote earlier
CS DISABLED <– Chip select disabled (V+)
SPI>
Read back the values to verify the write operation. Send the read command (0x03) and the address to start reading at (0x00), then read 5 bytes from the chip (r:5). The output should match the values we wrote earlier.
*EEPROMs larger than 256 bytes use 16 bit (2 byte) addresses. Enter a two byte address such as “0 0” if you’re using one of these EEPROMs.
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hackaday have bus pirates on the brain??
Is there a good site or book out there that can help me start to understand electronics? I have played with them ever since I was a kid and I would like to know more. Where do I begin?
The ‘3EEPROM’ test board in the picture has a 1-wire EEPROM, I2C EEPROM, and SPI EEPROM. We use it to test these protocol libraries before releasing new firmware.
What about using this with the SPI parts used for BIOS? It could be useful in un-bricking mainboards with a bad flash.
Okay, I believe Maxim makes hardware that translates from one protocol to the other.
Incidentally the One-Wire one is actively developed for by Linux users, including myself.
Are there any provisions for uploading files to EEPROMs? A common reason to use these memory chips is when your uC’s onboard memory can’t handle what you want it to do (I.E. sound or picture files). But then you run into the problem of how to get your files onto that chip, so you have to invest either time or money in a separate device just to burn your memory.
I personally don’t know a thing about common file transfer protocols (xmodem, kermit, etc.) so I don’t know what to do (and I’ve got a pile of other projects to work on).
@matt – Fantastic idea, we’ll find some BIOS chips to play with.
@gcl – Yup, Maxim makes an I2C->1-wire converter chip, and other adapters. 1-wire, I2C, and other buses are common inside a PC. 1-wire parts are often used for their unique 64bit serial number.
I’m not sure of many places where you can get those signals outside of the PC without some sort of external bus adapter. I know there’s an I2C connection for DDC in DVI connectors and some VGA cards.
@killerspud – EEPROM programming from a file is on our development roadmap. It’s a needed feature. We’ll just recycle the code we used for the JTAG XSVF uploader.
@killerspud – You would need to stream the file to your microcontroller, using a receive buffer to hold the incoming data while you write it to the eeprom.
Think of it like a sink. The faucet is the PC sending the file to the microcontroller. The basin is the buffer. The drain would then be the eeprom. If the faucet/PC pours water/data in to the basin/buffer faster than the drain/eeprom takes it out, the basin/buffer will over flow, and some of the water/data wont make it to the drain/eeprom.
Just make the PC send the data slower than the micro can write to the eeprom.
We used XON/XOFF software flow control with a ‘dribble’ buffer in the JTAG programmer code.
are this IC used on MIDI player that easily got corrupted that need to reprogram to go back to life again?
If this EE is the only 1 SPI device on the SPI bus, is there a way to use it with CS pin hardwired to GND?