Arduino implemented on an FPGA

If you think that Arduinos are overkill in most projects we can do one better for you. [Jack Gassett] has a virtual Arduino running on a Field Programmable Gate Array. We checked in with [Jack] back in November to see his work with the AVR8 Soft Processor, an FPGA version of an AVR chip. Because the Arduino uses AVR it wasn’t too much of a leap to make this Arduino compatible. We’re lacking in imagination when hit comes to using this method productively, but we’re sure someone will find a way.

[Thanks Drone]


  1. Erik says:

    Show me it blinking an LED and color me impressed!

  2. fenwick says:

    If you would just click the link, they have some on their website.

  3. Hak8or says:

    @ fenwick
    /s mate :P

  4. Scott says:

    Do people understand what we mean by overkill? People make the electronic equivalent of a LED BLINK circuit and use a 28-pin 32-bit AVR development board to do it. Most of the things people use ARDUINO for can be done with a single ATTiny45 chip (google it). This project is awesome though! … but prevent overkill? I doubt it.

  5. Spork says:

    This is actually really great. Consider how hard it is to go from an ATTiny45 to an FPGA. This is probably the easiest starting point you could have.

  6. localroger says:

    Now we just need someone to use a massively parallel supercomputer to emulate the FPGA emulating the Arduino. Preferably a massively parallel supercomputer built out of Arduinos.

  7. charlie says:

    A beowulf cluster out of this would be great.

    yeah i went there. I’m taking it back.

  8. dick twitch says:

    would cutting out part of my cerebral cortex be enough of a massively parallel computer. and using this with some bioengineering to emulate the arduino and make an led blink. yes this would definitely and literally be an over kill

  9. Erik says:

    But it’s manually controlled via a button – not autonomous. A true testament to its power would blink an LED!

    I’m also being sarcastic…

  10. Mikey says:

    It could blink the LED faster if you overclocked it.

  11. Pierce Nichols says:

    What makes this useful is what else you put on the FPGA with it. And I can think of *LOTS* of interesting possibilities there.

    How about onboard USB, like a ATMEGA32U4? Or an FPU? Or some neat integrated I/O? That’s just what comes to mind off the top of my head… I am sure people will think of more cool stuff.

    I think I want a Mega form factor board based on this.

  12. smoker_dave says:

    You could liquid cool it too

  13. BartB says:

    The real power of a softcore is when you need extra peripherals you can just add them. Need more ram? Add some blockrams. The process used in FPGA’s is usually a bit more modern so the clock speed is usually a bit higher.

    I would love to see a AVR core for an FPGA that you can easely program via ISP. So once you have a good hardware platform, its just like a ordinary AVR but with extra stuff.

  14. Jack Gassett says:

    @Pierce Nichols

    You hit it on the head with what we are trying to accomplish with the Butterfly Platform. We have a ways to go still but what will set it apart from the Arduino and others is the peripherals. The goal is to enable advanced functionality such as touch screens, wifi, usb hosts, and anything else people dream up in a familiar environment like the Arduino IDE.

    We have a full blown ethernet addon in testing that costs less than $5 in parts. Since the ethernet core would live in hardware and the Arduino core can be sped up there should be no SPI limitations. It will be an unlimited ethernet implementation for a very low price.

    We are also looking at a USB host controller addon that would cost less than $5 in parts. Those cheap Wifi dongles would make a nice addon for a gadget.

    Full speed LCD touchscreens such as the Sony PSP or Nintendo DS touchscreens could also be added as a peripheral.

    It will take some more time and development but we will be able to do some very advanced things while making it easy to use with the Arduino IDE.


  15. Spork says:

    Normally, I support the bashing that happens after misusing the arduino, but most of the posts here are just stupid.
    Seriously, if you want to joke about how much you dislike the arduino, there are plenty of terrible uses already posted on hackaday. This is a legitemate use, you can start with arduino on the FPGA, then set up the FPGA to specifically fit your individual needs.

    It’s a great starting point on FPGAs, maybe you are just too dense to see that though.


  16. Jack Gassett says:


    The AVR8 does have a JTAG core module, I haven’t explored it much since I use my own bootloader. But with a minimal amount of work (just defining the jtag pins in the ucf) the AVR8 is programmable with AVR programmers. The original implementation actually uses the JTAG core to program the BRAM.


  17. Frogz says:

    tommorow on, windows emulated on a arduino running a virtual arduino in software!

    hey hackaday, you guys are getting rich off of advertisments right?
    buy 10,000 amtel chips with arduino bootloaders
    allow people to order 1 per household under the agreement that they will post their project to the had forum(so HAD, where IS our forum???) and advertise hackaday on a printable banner they can leave places

    put the circuit to program and use it with cheap parts from ratshack via serial(people who dont have serial can check a checkbox and will re-sell them a usb to serial adaptor from a online retailer who pays hackaday commisions)

    THEN when people submit projects, SELL MORE ADVERTISING~

    but that way more people who currently hate arduinos, will be able to try them and if a few thousand people view their project on HAD forums, they will pay for themselves

  18. cantido says:

    @Jack Gassett

    Xilinx have tons of IP cores available.. I’m sure Altera have the same. They both also have softcore designs that are designed to be
    synthesised for their chips.. oh then you have opencores and the whole wishbone thing. So, in summary I’m not entirely sure what is so great about your stuff opposed to any other CPLD/FPGA dev board.

  19. Jack Gassett says:


    The difference is open source hardware building blocks that snap in and a design environment that does not require learning HDL or synthesis tools.

    Many cores require a hardware element. Diffential PHY for ethernet and USB are examples, we are making modules that just plug in so you can use the cores without designing a circuit. You could, of course, use a development kit but development kits are overkill that you cannot realistically sell once you make the next greatest gadget on it. With our open source boards you can sell what you create and keep the price down by only including the hardware modules that are needed.

    Using the IP cores from Xilinx, Altera, and opencores takes a lot of specialized skills. Our goal is to make an environment that provides access to all the great cores out there without the overhead of learning HDL and synthesis tools. It is the same thing that the Arduino did for microcontrollers, simplifying the technology so it is accessible to more people. We are trying to do the same for FPGA’s.

    With this Arduino on FPGA project you can start using an FPGA without learning one thing about FPGA’s. This lets you start learning what you need as you go.

    That is the goal anyway, we still have a long way to go.


  20. Moi says:

    @candido and Jack Gasset

    The Arduino core has limitations (e.g. 2K RAM is ridiculous). So the solution of open cores that are exactly suited to the needs (I/O, RAM, timers) is the best way to go (my opinion of course).
    The great thing with Arduino is the IDE and the standard library. It is simple enough to be shared by many and reach a critical mass that makes it a success.
    There is a wide gap between the skills needed to program an Arduino and working with a FPGA. But when you consider the lengthy catalogs of microcontrollers, a few FPGA boards could support all this variety and more, with incredible ease for the user to adapt the resources to its needs.
    It would still be overkill, but with a limited number of standard board the economy would be real.
    There is a need to automate (or simplify) the process of designing and synthesizing the needs (I/O, timers, etc.) around an open core, and then provide the same IDE as the Arduino but with libraries adapted to the open controller core.
    That will be the best of both worlds.

  21. Shaun McMaster says:

    How about replicating 6-8 CPU’s inside of a single FPGA. One chip, multiple CPU’s, with some custom hardware pieces (UART, I2C, PWM) plunked down as well.

    Or how about an Audino with 32 PWM modules instead of 2.

    This is what ‘soft cores’ in FPGA’s are really good for. Making a semi custom system of CPU’s with just the peripherals you need and none of the stuff you don’t.

  22. cf says:

    @Shaun – I’ve been working on an 8-way cache-coherent memory system for an FPGA, but I didn’t really have a use in mind.

    Hello 8-core, cache-coherent Arduino!

  23. choco says:

    So much creativity and talent wasted with arduino, where you could do so many more brilliant things with FPGAs.

    That Butterfly board looks interesting though.

  24. cantido says:

    @Jack Gassett

    Mmmm sorry, but if you don’t really want to learn a HDL why would you use an CPLD/FPGA? Wouldn’t it just be easier to buy a board with an “ARM7TDMI + everything you might ever need MCU” onboard from the get go?

    If you had a nice SoC generator that took the users requirements and then generated a bitstream they could upload on to their device that might be cool but I’m not sure of the point when you can go out and buy a board like the Beagle board.


    If you need a faster processor get a faster processor. If you need lots of memory get a chip with an external bus. If you’re afraid of actually having to write some code for your hardware instead of having an IDE generate it (The ARM IDE’s will generate your startup code for you though..) get one with enough hardware to run uclinux. The Atmega 168′s specs aren’t limitations, it’s specced that way because it’s intended for jobs that only need that amount of hardware. Most vendors have nice hardware programming manuals, you shouldn’t really have to rely on libraries and IDE generated code for everything.

  25. A. Karttunen says:

    Great work and congratulations to Jack Gassett!

    I have been toying with this same idea for a few
    months now, especially since I realized that
    there already was an AVR-core in

    It’s a pity that most of the commenters do not realize at all the potential of this, instead
    seeing it just as another useless bravado.

    A few questions to Jack: At what speed you drive that Spartan-3 ? How many Spartan cycles one “AVR cycle” takes? I.e., how fast you can run the AVR-core, compared to hardcore-microcontroller based Arduino’s and clones? (8Mhz? 16MHz?)

    What are you planning for as a price for that
    Butterfly Uno board?

    And please keep on doing the great work!


    Antti Karttunen,
    from Helsinki Hacklab.

    PS. And to all those “wannabe-professional-EE” people who whine here about Arduino, how it is overkill to this and that, blaa-blaa-blaa,
    don’t you realize that the economics (in a wider
    sense of not only money, but also the time and skills invested) when doing some one-off hobby or artistic project, are TOTALLY DIFFERENT than when choosing a right microcontroller to run a dish washing machine? (Some people’s dream job, I reckon.)

    PPS. It’s interesting that a couple of years ago introduced XMOS is also embracing the hacker/hobbyist market now (see their advertisement on the top of this screen).

  26. Jack Gassett says:


    The AVR8 core is one of the great cores from opencores. The current Butterfly Boards have an 8Mhz clock but any clock speed can be easily generated with the four DCM’s (Digital Clock Managers) in the Spartan 3E. (I chose a low speed 8Mhz clock to keep as much high speed signals off the dual layer pcb as possible.) Right now I’m just passing the 8Mhz clock directly to the core but the next step is to pass it through a DCM and double it to 16Mhz. I’ll also increase the memory to 16KB. Currently 8KB is implemented (I want to include a Logic Analyzer core so the Arduino pins can be monitored without connecting any leads so I left some BRAM’s empty).

    The Spartan 3E’s DCM is able to run up to 300Mhz so theoretically the AVR core could run up to 300Mhz but realistically it can probably run up to 100Mhz. Only testing will tell, it can definitely run faster than 16Mhz.

    I spent quite a bit of time running the AVR core in a simulator while trying to get everything to work (turned out the problems were not with the core itself). The pleasant surprise was that everything I observed and compared to an AVR simulator was clock cycle accurate.

    I was caught a little off guard by this hackaday submission, I was going to submit it myself once I had some Butterfly One and Butterfly Uno boards ready. So I was caught with a very limited supply of my older boards. The aim of the new boards is to really bring the price down. The Butterfly One should have a price of $40-50 and includes a ft2232 chip for fast programming. The Butterfly Uno is meant to use an Arduino as its programmer which eliminates the need for the ft2232 chip and lowers the price even more. The target price for the Butterfly Uno is $30-40.


  27. A. Karttunen says:

    @Jack: Thanks for the reply! I figure from
    it, that one AVR-cycle takes one FPGA-cycle?
    Does that AVR8-core implement it only
    “ouwardly” (opcodes, etc.), or does it use internally some of the same pipelining & other tricks than in the “real” ones? Actually, I’m ignorant if there are any other than “a two stage, single level pipeline design” (from Wikipedia) in the low end AVR’s.

    I guess you use Xilinx’s WebPack ISE for your work?
    By the way, I myself try to get my Verilog code so clean, that it works on the FPGA itself right from the start, that I wouldn’t need to use that quite limited simulator that comes with WebPack,
    and which usually doesn’t correspond with a real
    synthesized core very well. E.g. a construct
    that might work in simulator allright, either
    does not synthezise at all, or synthesizes
    but functions in a different way.

    If you are using WebPack, could you show
    its summary (and maybe other) report files
    (they are HTML or text files mostly),
    to get an idea how much of the resources
    of that Spartan 3-250 (???) the AVR-core
    takes, and how much is free for other purposes?

  28. therian says:

    WOW what a brake thought, no one thought it possible to emulate power regulator with FPGA, wait you didn’t than where is hardware difference from atmel chip ?

  29. Jack Gassett says:


    The syntehsis report is checked into svn and can be viewed here:*checkout*%2Ftrunk%2Ftop_avr_core_v8_summary.html&revision=12

    The design uses 70% of the logic and with 8KB of program space and 1KB of SRAM it uses 50% of the BRAM.

    Yes, I use the free Xilinx Webpack and the free simulator so anyone can make changes. Very true that behavioral simulation will work great and then not work in the implementation. With the AVR core I have seen the same results in both. Ruslan Lepetenok, the original author did a great job with the core.

    Several of the AVR opcodes take more than one cycle, what I saw was that the amount of cycles each opcode takes matches the cycles on the FPGA clock. So if an opcode takes one cycle according to the Atmel datasheet then it takes one cycle on the FPGA. Those that took 4 cycles also took 4 cycles. I did not look at every opcode but all that I did matched.


  30. RobotDude says:

    If you don’t know the applications for a softcore on a FPGA, you are an idiot. If you use any type of a microcontroller for specifically toggling LEDs your an idiot. Why are people so concerned about toggling LEDs? You can do that with a handful on parts, you don’t need a micro controller. What a waste. Be smart and efficient people. And the comment about overclocking to toggle the LED faster, I hope you are joking.

    All frustration aside, implementing softcores are FGPAs is great. FPGAs can do things much faster and more efficiently than uCs, so combining can make things fun. Check out pico and microblaze.

  31. Jack Gassett says:


    I like both the microblaze and picoblaze cores. There is a great project to run uClinux on the microblaze core and it is my goal to bring that project to the Butterfly Boards in the future. (external SRAM is required first)

    I was actually going to modify the Arduino IDE to support the microblaze processor at first. I figured that I wanted a proven commercial processor and thought the $500 EDK fee was worth it for stability. But I was so impressed with the quality of the AVR8 and since it is open source I went that route instead. Only time will tell how stable it proves to be but I am very optimistic that it will be fine.

    The great thing about picoblaze is its small size and speed. We have a stealth project based on the picoblaze that will be amazing if we can get it to work. Can’t say much else about it yet but if it works the 100k Spartan 3E chip will be much more useful than it is now.

    On a side note, once there is external RAM in place we will be able to bring things like a Java Virtual machine, uClinux, and a x86 processor to the Butterfly Platform. But one thing at a time, right now we are focusing on the low end.


  32. RobotDude says:


    Very nice. I have not tried implementing uCLinux yet,but will take a look. Sounds interesting. I don’t normally post on here, so sorry for the rant. I get tired of people making comments that have nothing informative or useful, like making a LED blink. People think harder!

  33. RobotDude says:


    People should look more into creating there own softcores. Even something really simple. It helps you understand how microcontrollers really work to be more effective at programming them. Just for learning purposes. No need to reinvent the wheel.

  34. Martha says:

    Is uCLinux powerful enough to run a torrent client?

  35. Entropy says:

    I see that you’re populating most of the boards (like the S3E Cocoon 2.01) in the store with 250K gate units. Will you be offering the option of 500K gate versions for an extra fee when ordering at some point?

    Also, do you have any plans to make any boards using the TQ144 or PQ208 packages to provide more I/O? (for example, they would be good for a high-channel-density light dimmer application.)

Leave a Reply

Fill in your details below or click an icon to log in: Logo

You are commenting using your account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s