This frequency counter is [Miguel Pedroso’s] entry in the 7400 Logic contest. After looking at the design we think this is a perfect project for those who have not worked with logic ICs before. The concept is simple and [Miguel] does a great job of explaining his implementation.
At its heart the device simply counts the oscillations of an input signal for one second, then latches the total to the 7-segment displays before zeroing the counter block and starting over. Six 4029 decade counters give the device a range of 1MHz. A set of 4511 BCD to 7-segment decoders translate the count to the display. A 4521 frequency divider chip uses an on-board 4.194304 MHz crystal oscillator to time both the display latching and the counter clearing. [Miguel] mentions that tuning the load capacitors is a bit tricky. Since breadboards have their own capacitance issues it may be necessary to change the load capacitor values when moved to protoboard or the crystal won’t start oscillating. You can see those caps are not the same value, but the tests in the video after the break show that this is pretty much spot-on.
If you’d rather give this a try in HDL here’s an FPGA-based frequency counter from which you can draw some inspiration.
Continue reading “7400 frequency counter”
Here’s another entry in the 7400 Logic contest. [Circuitchef] used gates and a few flip-flops to build a two-player electronic Tic-Tac-Toe game. The full details or shared in the PDF file he links to in his post. We’ve also linked to it after the break in case the Dropbox he is using becomes unavailable.
He provides a nice block diagram which helps to understand the game’s design. The board is arranged in a 3×3 matrix of momentary push buttons and bi-color LEDs. Each player takes turns pushing the button in the square they’d like to claim. The input circuitry uses flip-flops to establish which player’s turn it is, illuminating the appropriate color for that square. A set of 3-input AND gates monitor all possible combinations of winning patterns. The outputs of those gates are OR’d down to just one output which is used to light up the ‘Winner’ LED with the right color. If all boxes are lit up and none of those combinations is satisfied the game is declared a draw. This can all be seen in the demo embedded below the fold.
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The mechanical simplicity of this pull-string controlled most useless machine is delightful. You can see the metal gripper which is reaching up to tug on a light-fixture-style pull chain. This is how it turns itself off after you’ve pulled the string to power it up.
The device is [Alex555’s] entry in the 7400 Logic competition. We do hope that he ends up posting a schematic because we’d love to see the gritty details of how it works. After the break you can watch two doors open, allowing the arm to raise up and the gripper to grab the chain. This takes just four servo motors, which are controlled by the signal from a 555 timer and some accompanying hardware.
Apparently the chain is a fake, as the servos didn’t provide enough force to actuate that type of switch. It’s not a surprise as those pull chains do require quite a tug. An optical sensor was used to trigger the movement when your hand reaches for the chain.
Continue reading “Pull-string most useless machine”
For this year’s 7400 logic competition, [Nick] decided to build an FPGA out of logic chips.
Perhaps a short explanation is in order to fully appreciate [Nick]’s work. The basic component of an FPGA is a slice, or cell, that performs boolean operations on its input and sends the result on its output. The core of these slices is a lookup table – basically a truth table that stores the result of every possible input combination.
One very easy way to implement a lookup table is to use a RAM or EEPROM chip. By tying the address lines of an EEPROM to the input and the data lines to the output, it’s possible to create a single slice of an FPGA very easily.
Unfortunately for [Nick], 74-series memories have long been out of production. There is another option open, though: shift registers. A shift register is basically an 8-bit memory chip with parallel inputs, so combining a shift register with an 8-input multiplexer is a very simple way to implement a 3-input, 1-output FPGA slice.
After figuring out how to tie these slices to bus lines, [Nick] needed a way to program them. Verilog or VHDL would border on insanity, so he wrote his own hardware description language. It’s certainly not as powerful or capable as the mainstream solutions to programming an FPGA, but it’s more than enough.
In the video after the break, you can see [Nick]’s overview of his very large 8-slice FPGA while he runs a combination lock and PWM program. All the code, schematics, and board layout are up on [Nick]’s git if you’d like to build your own.
Continue reading “Discrete FPGA will probably win the 7400 logic competition”
[Viktor] just pulled out another one of his decades-old projects. This time around it’s a timer he built using 7400 logic chips. It was a great way for him to learn about electronics, and ended up serving as his alarm clock every morning.
Two pieces of copper clad board were cut to the same size. One of them was etched to act as the circuit board. The other was outfitted as a face plate. The same type of transfer sheets used to mask the traces of the circuit were also used to apply labels to the face plate. It was then coated with acrylic spray to protect it and stave off corrosion. The clock keeps time based on a half-wave rectified signal. The source is from a transformer which steps mains voltage down to a safe level for the 7805 regulator that supplies the clock’s power bus.
We’re glad [Viktor] has been showing off these old projects. We’ve also enjoyed seeing a TV sleep timer he built. If you’ve got something neat for yester-year why not dust it off, post the details, and send us a tip about it?
[Nakul], [Nikilesh], and [Nischal] just finished posting about their entry in the 2012 Open 7400 Logic competition. It’s an encryption system based entirely on 7400 logic chips. The device operates on 8-bit binary numbers, which limits its real-world applications. But we bet they learned a lot during the development process.
The encryption algorithm is based on a the concept of cellular automaton. This is a something with which we’re already familiar having seen many Conway’s Game of Life projects around here. What we’re not familiar with is this particular wing of the concept called ‘Rule 30‘. It works well with this project because a complex pattern can be generated from simple beginnings.
After conceptualizing how the system might work the team spent some time transferring the implementation to the chips they had available. The end result is a quartet of chip-packed breadboards and a rat’s nets of wires, but the system is capable of both encrypting and decrypting data.
This soldering nightmare is a configurable RFID tag which has been built from 7400-series logic chips. The beast of a project results in an iPhone-sized module which can be used as your new access card for security systems that uses the 125 kHz tags. The best part is that a series of switches makes the tag hand programmable, albeit in binary.
Of course this is an entry in this year’s 7400 Logic Competition. It’s from last year’s winner, and he’s spent a lot of time documenting the project; which we love. We were surprised that this many chips can be powered simply by what is induced in the coil from the reader. This is just one of the reasons the 7400-series have been so popular over the years. After working out the numbers, a 64-bit shift register was built to feed the tag ID to the encoding portion of the design. There were many kinks to work out along the way, but once it was functional a surface-mount design was put together resulting in the final product shown off in the video after the break.
Continue reading “Configurable RFID tag from 7400 logic chips”