AVR8 virtual processor on FPGA

[Jack] wrote in to let us know about a project that creates a virtual microprocessor core based on the ATmega103 by using a Field-Programmable Gate Array. Great, we thought. Here’s another rather esoteric project like the NES on a FPGA, but what’s the motivation behind it? We asked [Jack] and he provided several scenarios where this is quite useful.

Implementing the AVR core allows code already written for the chips to be easily ported to an FPGA without a code rewrite. This way, if your needs outpaced the capabilities of the microcontroller long after the project has started, you can keep the code and move forward from that point with the added capabilities of the gate array. Having the core already implemented, you then only need to work with HDL for the parts of the project the AVR was unable to handle. He also makes the point that having an open source AVR core implementation provides a great tool for people already familiar with AVR to study when learning VHDL.

With products like the Butterfly that this project is based around, or the Maple we’ve seen in the past, programmable logic for the recreational hacker is starting to get a little easier.

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