How much memory do you really need? We suppose it’s not really our place to judge how you misuse use memory in your projects. But we do appreciate the clean and orderly technique that [Eric Rogers] uses to add multiple SPI SRAM chips to an Arduino.

The heavy lifting is done with a CPLD shield called the Amani 64. It intercepts the SPI calls from the Arduino to an SRAM chip, and translates the address information to find the appropriate data on a collection of 23K256 devices. These chips are inexpensive, and using several of them provides a savings over choosing a single SPI addressable chip with a larger memory size.

The best part is that the flexibility of the CPLD allowed [Eric] to devise an addressing system that takes advantage of unused bits in the Arduino’s SPI data transfer functions. When using a single 23K256 chip, there are four write functions that waste a total of six bits. He devised a method to inject addressing data into these unused bits, allowing him to address up to 64 different memory chips for a potential of 2 MB of storage. The CPLD pulls out this injected address and subsequently writes or reads the bank of SRAM chips.

Looking for other SRAM upgrade options? Here’s another one that uses multiplexing to decrease the address lines necessary to add memory.

Your party is lame if it doesn’t include interactive blinking lights on the dance floor. [Mario] and [Lukas] didn’t want to have lame parties, so they enlisted some fellow students to build an interactive dance floor (translated). The finished party-piece is 4 meters by 2.5 meters (that’s about 13′x8′ for us yanks) and includes 160 lighted squares. But it’s the electronics that really make this a heavy project.

Milled into the underside of the pressboard base are a series of pockets and channels to hold various components. If you look hard enough, you’re going to find eight AVR microcontrollers which control the LEDs, 8 CPLDs to manage the weight sensors which make the floor interactive, and an FPGA and embedded computer to tie everything together. It’s movable, a hit at parties, and so far it seems to hold up to the occasional spilled beverage.

You can’t share a project like this without some video. See it after the break.

It seems like all the cool kids are leaving the 8-bit hobby microcontrollers in the parts bin and playing with more advanced parts like Complex Programmable Logic Devices. [Chris] is no exception to the trend, and set out to generate his own VGA signal using one of the beefy semiconductors.

It seems that he’s using the acronyms CPDL and FPGA interchangeable in his post but according to the parts list this setup uses an Altera EPM7128SLC84-7N CPLD. In order to generate the VGA signal he needed a way to convert the digital signals from the chip into the analog values called for in the video standard. He chose to build a Digital Analog Converter for the RGB color values using a resistor network which he calculated using PSpice. The other piece in the puzzle is a 25.175 MHz oscillator to clock the CPLD. As you can see after the break, his wire-wrapped prototype works exactly as designed. The example code generates the rainbow bars seen above, or a bouncing box demo reminiscent of a DVD player screen saver.

Want to know more about programming CPLDs? We did a tutorial on the subject a while back.

This device is called the Cumulus and it’s used to emulate the floppy disk hardware for Oric-1 and Oric Atmos computers. These 1980′s era computers included an expansion slot to which you could connect a floppy drive. That module, called a Microdisc system, also included the driver circuit which means you can’t just use a modern-day floppy drive as a replacement. [Retromaster] sidestepped the need for magnetic media all together by building an SD card interface which emulates the original module. We can tell by the use of a color screen and clean board layout that a lot of love went into the project. A CPLD implements the communications protocol used by the Microdisc system and creates all of the registers that would have been found on the original hardware. A PIC takes care of the SD card communications and the user interface.

With the exception of comforting noises, we’d bet there are few who have fond memories of using floppy disks. No wonder we’ve been seeing hacks to replace them quite a bit lately.

We asked for responses to our last Development Board post, and you all followed through. We got comments, forum posts, and emails filled with your opinions. Like last time, there is no way we could cover every board, so here are a few more that seemed to be popular crowd choices. Feel free to keep sending us your favorite boards, we may end up featuring them at a later date!

The Popular:

Parallax Propeller: We heard the loudest cries from the Parallax fans out there. The Propeller is a unique chip, in that it contains 8 cores called cogs which each take turns executing separate code. This design allows for disregarding of interrupt style programming in favor of assigning each core a specific task. There are a number of boards available, including Gadget Gangster’s platform as well as boards from Parallax. Thinking in terms of 8 cores rather than one may present a learning curve to some embedded programmers, though there are a number of code examples to pull from online to get beginners on their feet.

Atmel’s AT90USB and AT32U4 based boards: Atmel’s AT90USB and ATmega32U4 chips are common on low part count boards like the Teensy/Teensy++ because of their built-in hardware USB support, which means no FTDI or equivalent chip required. These development boards tend to be low-cost, easy to implement on a breadboard, and in cases such as the Teensy, are Arduino IDE compatible. The chips these boards are based on are also an excellent place for those trying their hand out at microcontroller circuit design for the first time because of their simplicity and low hardware requirements.

Microchip’s PIC line: Somehow, we managed to leave the entire Microchip crowd in the cold last time. A popular set of microcontrollers with a similar market segment to Atmel’s chips, these chips vary from the low-end and low-cost 8-bit series to the higher end 16 and 32-bit models. We received a good number of development board recommendations, all ranging in price, features, and ease of use. We’ll rely on comments and forum posts to help convince you what specific model to try.

[edit: Added the PicKit3 as per popular request]

The Powerful:

mbed: Possibly one of the most popular hobby development boards for ARM’s Cortex-M3 chip, the mbed features a similar footprint to the Teensy, but with a huge jump forward in power. The mbed includes hardware for a number of peripherals, including support for ethernet with the addition of an RJ-45 port. The major difference between the mbed and other similar boards is the entirely web-based IDE. We have previously reviewed the mbed, so for more details be sure to check it out.

Renesas’ RX62N RDK: Whenever a company gives away development boards for free, the community often jumps on the offer. Rather than the normal free barebones boards though, the RDK has a good number of on board peripherals, including an Ethernet port as well as a 3 axis accelerometer. Unfortunately you can’t get one for free anymore (at least not this contest), but from all we have heard from our readers, it may be worth investing in anyway.

The Maple: The Maple from LeafLabs is an excellent example of the effect open hardware tools such as the Arduino have had on the hobbyist environment. Featuring an ARM Cortex-M3, the Maple has plenty of processing power and also can brag that it has the same header layout as the Arduino. This means that almost all commercially available Arduino shields will work on the Maple, a major selling point for anyone who has invested into a well stocked Arduino setup but needs an injection of performance.

Bonus Points:

OpenWRT based routers: Often, projects need to be networked either by wire or wirelessly to operate as desired. Rather than buying a high-end development board with ethernet or Wi-Fi built-in, many readers suggested buying (or salvaging) any one of a number of low-cost wireless routers, and installing a custom linux based firmware on them. These boards often tend to have UARTs or USB ports originally meant for debugging available for expansion with sensors or other low-end microcontrollers. A hack in the true sense of the word, we applaud this sort of creativity. Some popular firmwares to check out would include DD-WRT, OpenWRT, and the Tomato firmware. Be sure to make sure support exists for your device before you go buying anything though.

FPGA boards: When we set out to cover development boards, we had microcontrollers in mind. However when it comes to signal processing, custom high-speed logic, or flexibility, FPGAs are an excellent choice. The two major players for hobbyists these days are Xilinx with their Spartan line, and Altera with their Cyclone line. Both companies offer their IDE for free, and it comes down to personal preference when choosing which way to go. Both companies also support SoC designs to implement virtual microcontrollers on the FPGA, which adds an additional layer of flexibility for any hobbyist or engineer. Chances are, most hobbyists will not need the performance of cutting edge FPGAs (or CPLDs), so keep an eye out for older development boards on sale, or development boards made by third parties.

Build your own: Although it may appear as a sort of “Get off my lawn” answer to our question, there is a lot to be said about building a development board from scratch. These days, many 8-bit or 32-bit microcontrollers require few if any external components to run in a basic mode, and can be combined with a JTAG or FTDI cable for programming and communication. There are countless tutorials on using perf-board or etching a board to make a custom circuit, and the experience is invaluable for breaking away from high cost development boards in simple projects.

[Phil] over at Retroleum has cobbled together a clean, well put together laptop based entirely around a Zilog Z80 microprocessor and a pair of Spartan II FPGAs. These FPGAs allow him to reduce the number of devices on his board, and therefore cut his production cost as well as device size. He even managed to integrate a salvaged PSOne screen. The laptop comes complete with [Phil]‘s own Homebrew OS as well as a great graphical vector based demo.

Sure he’s updated the project in recent years to shrink the board, speeding up the Z80, and increasing the peripheral speed and functionality, but we’re suckers here for a total package hack. Seriously though, check out the newest version of the device as well as the backlog that shows the project growing over time.

Thanks to [Steth] for the heads up.

If you can fabricate single-sided circuit boards at home you can build this digital oscilloscope. It uses mostly through-hole components with just a couple of surface mount chips to contend with. An ATmega162 handles the hardware end of things with a CPLD used to manage the sampling rate. Data is displayed on a 240×128 LCD display which will be the most expensive component to acquire. It’s still a lot cheaper than buying a commercially available oscilloscope, even if you get a base model and hack it to unlock all the features.

[Thanks Juan]

[Bradley] decided to tackle the challenge to recreate the original Nintendo Entertainment System’s processor in a Field Programmable Gate Array. Say what? The original NES is a Legacy System, still used but no longer manufactured. If a system breaks, it becomes more and more difficult to repair or find replacements parts as time passes. By using a programmable integrated circuit such as a CPLD or a FPGA to clone the functionality of the original hardware, legacy systems can live on long after the original hardware has given up the ghost.

It took [Bradley] about a year to fully implement the NES processor as part of his Master’s project at Bradley University. He used what was known about the processor combined with some detective work with logic probes along the way. The programming was done in VHDL and those files are available for download (click on Documentation).

With the ubiquity of NES emulators on every device known to man you probably won’t be replicating this unless you want a reason to play with a FPGA. What interests us is the hardware solution this type of work provides for obsolete hardware that still serves a useful purpose. If you’ve used a FPGA or similar device to keep an old system running, let us know about it in the comments.

In our Dev Phone 1 excitement last week, we somehow overlooked phoneWreck’s teardown of the T-Mobile G1. The complex slider mechanism is certainly worth looking out. One of the major oddities they point out is the inclusion of two vibration motors. One is mounted next to the SIM on the mainboard. While the other is mounted in the frame next to the earpiece. We wonder what was gained/solved by using two. The phone also includes a digital compass module. We’d like a more detailed explanation of how the Xilinx CPLD is used. From this article in 2006, it seems HTC uses them to generate custom clock signals and switching off devices for power management.

Complex programmable logic devices (CPLDs) contain the building blocks for hundreds of 7400-serries logic ICs. Complete circuits can be designed on a PC and then uploaded to a CPLD for instant implementation. A microcontroller connected to a CPLD is like a microcontroller paired with a reprogrammable circuit board and a fully stocked electronics store.

At first we weren’t sure of the wide appeal and application of CPLDs in hobbyist projects, but we’ve been convinced. A custom logic device can eliminate days of reading datasheets, finding the ideal logic IC combination, and then waiting for chips to arrive. Circuit boards are simpler with CPLDs because a single chip with programmable pin placement can replace 100s of individual logic ICs. Circuit mistakes can be corrected by uploading a new design, rather than etching and stuffing a new circuit board. CPLDs are fast, with reaction times starting at 100MHz. Despite their extreme versatility, CPLDs are a mature technology with chips starting at $1.

We’ve got a home-etchable, self programming development board to get you started. Don’t worry, this board has a serial port interface for working with the CPLD, and doesn’t require a separate (usually parallel port) JTAG programmer.

Intro to CPLDs

When to use a CPLD

Consider using a CPLD when a design calls for more than one 7400 series logic ICs. A CPLD will be cheaper, faster, and can be programmed with your ideal pin-out configuration for simpler PCBs.

Use a CPLD in tricky designs that might require several iterations. It’s easier to design a new circuit in software and upload it to the CPLD than it is to design, etch, and stuff a new circuit board.

For maximum speed and instant response, choose a CPLD. The difference in speed is amazing; CPLDs start at a 100MHz, while microcontrollers respond to interrupts at a few MHz. CPLD designs form circuits that react to external stimulus, reactions occur almost instantaneously. A microcontroller executes code to react to events, even interrupt routines have comparatively high latency.

CPLD vs FPGA

FPGAs are better known than CPLDs, but they share many characteristics. This analogy isn’t perfect, but we like it: where FPGAs are a reprogrammable processor core, a CPLD is a reprogrammable circuit board or breadboard. FPGAs replace microcontrollers, memory, and other components. CPLDs absorb logic ICs, and work well with a microcontroller.

Manufacturers

Altera and Xilinx, the biggest CPLD manufacturers, are better known for their FPGAs. Lattice Semiconductor is another large CPLD manufacturer with less community following. Atmel makes pin-compatible versions of old industry-standard CPLDs.

If you plan to work at 5volts, your options are limited. Xilinx XC9500 CPLDs are still available as new old stock, but cost four times more than newer 3.3volt equivalents. Atmel’s ATF1502 series works at 5volts, but they don’t offer a free development environment.

At 3.3volts there’s more options, but new CPLDs increasingly have a core that runs at 2.5volts, 1.8volts, or lower. The Altera MAXII and the Xilinx XC9500XL series are probably the most popular 3.3volt CPLDs. Xilinx also makes the CoolrunnerII CPLD, but it only comes in a TQFP package and requires a separate 1.8volt supply for the core.

Packages

Most manufacturers offer one or two CPLDs in a hobbyist friendly PLCC 44 package, though this is starting to disappear. PLCC is an SOIC-sized surface mount chip with pins on all four sides. PLCC44 sockets are commonly available in through-hole and SMD versions. Unfortunately, newer CPLD families are starting to eliminate the PLCC package and offer only 44 pin and larger TQFP chips, such as Xilinx’s CoolrunnerII.

Development environments

Most manufacturers offer a free development environment that supports design entry using simple schematics, as well as Verilog or VHDL. Many won’t support the latest FPGAs in the free version, but we only need the CPLD parts anyway. Altera has Quartus, Xilinx has ISE, and Lattice has ispLever. Atmel has ProChip Designer for the ATF15xx series, but they only offer a 6month trial license — which they wouldn’t actually give us.

Programmers

The development board we present doesn’t need a separate JTAG programmer because the PIC microcontroller already programs the CPLD.  If you want an external programmer, the cheapest are the parallel port programmers: Parallel Cable III for Xilinx and BytleBlaster for Altera. Inexpensive clones, and schematics, are available at SparkFun.  The OpenOCD is a generic USB JTAG programmer that will work with many CPLDs, FPGAs, and ARMs.

Our choice

We eventually settled on the Xilinx XC9500XL series because it had a cheap development kit we could use to test our JTAG programmer prior to implementing an entire design.

The DO-CPLD-DK from Digilent includes a XC9572XL, a CoolrunnerII, and parallel port programmer. Nu Horizons has some old non-ROHS models for $40, but due to sloppy variable type handling in their credit card processing scripts, we couldn’t complete an order online. We tried to do it over the phone but they refused to take such a small order on the phone, even during a website malfunction. In the end, it was cheaper to pay full price at Digikey (#122-1512-ND) after including New Horizon’s exorbitant shipping charges. We wouldn’t normally mention this, but with only two places to buy the board it’s probably worth noting our experience.

CPLD development board

Click here for a full size schematic image (PNG). The circuit and PCB are designed using the freeware version of Cadsoft Eagle. All the files for this project are included in the project archive linked at the end of the article.

Circuit

A PIC 24FJ64GA002 microcontroller (IC1) provides the user and programming interface to the CPLD. We use this $4 PIC in a lot of projects because the peripheral pin select feature makes board routing really easy. Check out our introduction to the PIC24F for more details. The PIC needs to communicate with a PC serial port, so we added an inexpensive MAX3232 RS232 transceiver. The serial interface should work with a USB->serial adapter.

Our choice of CPLD (IC3), a Xilinx XC9572XL (PDF), is connected between the PIC and several other components. We can create an endless variety of circuitry between the PIC and other chips using the reprogrammable logic inside the CPLD. The PIC will program the CPLD with code sent from a PC serial port, but we still brought the JTAG pins to a header for easy external debugging.

A DS1085 digital programmable oscillator (IC4) generates clock frequencies between 8KHz and 133MHz, at 10KHz increments. This is very similar to the DS1077 we covered earlier, but it has even steps between all frequencies. The DS1085 requires a 5volt supply (VR2). The I2C interface also runs at 5volts, so we connected it to 5volt tolerant PIC pins. It’s possible to use the 3.3volt 66MHz 1085L instead, and remove the 5volt supply.

We used a cheap 3.3volt SOT223 voltage regulator (VR1) to power most of the circuit.  The 5volt supply (VR2) can be excluded if you use a slower 1085L 3.3volt oscillator.

CPLDs are commonly used as a memory controller, so we included 32K of SRAM (IC5) on the development board. A 3.3volt latch with 5volt tolerant inputs interface the memory inputs to a wide range of external voltages (IC6). The latch inputs are held low with a 1Mohm resistor network (RN1). We’ll discuss this section extensively in an upcoming article.

PCB

The board is a quasi one-sided design. We made several compromises so we could prototype this highly experimental PCB ourselves. We present the board ‘as is’ for other die-hards that might want to etch this board at home. If you send the PCB to a board house, try to correct these issues prior to producing a ‘real’ double-sided board.

One power pin of the CPLD is missing a decoupling capacitor entirely; there was no way to put a capacitor in that area. One CPLD decoupling capacitor, and the SRAM decoupling capacitor, are through-hole parts. Using these through-hole parts eliminated a few jumper wires.

The jumper wires on the back of the board are optimized for single-sided production, rather than good design practices. We faked a double-sided board by soldering the power bus on the back. A real double-sided board design should route the power bus to avoid crossing signal paths, and include the missing decoupling capacitors.

We used an surface mount PLCC chip socket, but a through-hole version is definitely a better idea. We though the SMD version would be easy to solder, but it turned out to be a nightmare. We really wanted the CPLD to be on the front of the board for the coolest possible presentation. A proper two-sided board with plated through-holes can have a through-hole socket on the front, but this wasn’t possible with our 1-sided prototype board.

Parts list

Click here for a full size placement diagram (PNG).

Firmware

The firmware is written in C using the free demonstration version of the PIC C30 compiler. Learn all about working with this PIC in our introduction to the PIC 24F series. The firmware is included in the project archive at the end of the article.

We wanted a super easy way to interact with the hardware on the board without endless compile-program-test cycles. We made a custom version of the Bus Pirate firmware that  provides a simple ASCII terminal interface to the DS1085 clock chip (I2C), the CPLD programing interface (JTAG), and a 3 wire (SPI) interface to the CPLD. Check out the Bus Pirate tutorial for background on the simple syntax used with the firmware.

The original Bus Pirate firmware handles several protocols that share the same pins. For the CPLD version, we changed the pin assignments to fit the connections on the development board. We also removed unused modules and options.

CPLD blinky LED examples

We prepared several designs in Xilinx’s ISE development environment. The schematics, pin placement files, and compiled designs (XSVF) are included in the project archive linked at the end of the article.  A full explanation of ISE is beyond the scope of this article; we found the help files sufficiently useful to make these examples.

The first design simply lights the LED connected to pin 8 of the CPLD.

Prepare the XSVF file

XSVF is a compressed JTAG programming format, as described by Xilinx in this application note (PDF). XSVF isn’t limited to programming Xilinx devices, and can be prepared for any chip that provides a common BSDL JTAG definition file.

Open the iMPACT programming tool from the ISE Design Suite project panel under Configure target device->iMPACT.

• Choose the option to create a boundary scan file,  and set the type to XSVF.
• Give the XSVF output a file name and then add a compiled CPLD image (ex1.jed) when prompted to add a device.
• You should see a JTAG chain that contains a single device.

Click on the device and choose program; iMPACT will record the programming sequences to an XSVF file.

With XSVF file in hand, it’s time to open up a terminal and program the CPLD. We like Tera Term and Hercules on Windows. You must enable XON/XOFF flow control in the client to use the JTAG interface. The default PC side setting for the development board terminal is 115200bps, 8N1.

HiZ>m <–select mode
1. HiZ
2. I2C
3. JTAG
4. RAW3WIRE
MODE>3 <–JTAG
900 MODE SET
602 JTAG READY
JTAG>(2) <–probe JTAG chain macro
xxx JTAG INIT CHAIN
xxx JTAGSM: RESET
xxx JTAGSM: RESET->IDLE
xxx JTAGSM: IDLE->Instruction Register (DELAYED ONE BIT FOR TMS)
xxx JTAGSM: IR->IDLE
xxx JTAGSM: IDLE->Data Register
xxx JTAGSM: DR->IDLE
xxx JTAGSM: RESET
xxx JTAGSM: RESET->IDLE
xxx JTAGSM: IDLE->Data Register
xxx JTAG CHAIN REPORT:
0×01 DEVICE(S)
#0×01 : 0xC9 0×02 0×06 0x9A <–XC9572XL responds
xxx JTAGSM: DR->IDLE
JTAG>

In the terminal we enter the mode menu (m), and choose JTAG (3). Macro 2 probes the JTAG chain, in our case this is just the CPLD.  The chain report tells us that the chip is connected and responding. Read more about the JTAG interface.

Now we can run the XSVF programmer, macro (3), and upload the XSVF file from the terminal in binary mode. The first example just lights the LED on pin 8. If the LED lights, we can verify that programming was successful. If your LED doesn’t light, don’t despair; sometimes the JTAG programmer sticks and a reset macro (1) will get the chip going.

LED at full brightness.

74LS32/4071 OR gate, blink at half rate (/2)

A major component of the CPLD development board is the 1085(L) frequency synthesizer connected to pin 7 of the CPLD. The next example uses a logic OR gate, like a 74LS32 or 4071 IC, to blink the LED whenever the clock signal is high. At even the slowest clock rate the blinking will be too fast to see, but we should get a nice PWM dimming effect compared to the first example.

JTAG>m <–select mode
1. HiZ
2. I2C
3. JTAG
4. RAW3WIRE
MODE>2 <–I2C interface to DS1085
900 MODE SET
202 I2C READY
I2C>(1) <–address search macro
xxx Searching 7bit I2C address space.
Found devices at:
0xB0 0xB1 <–found the DS1085 address
I2C>

Program the CPLD as before, and then switch to I2C mode to access the DS1085 clock. We could look up the device address in the datasheet, but we save a few seconds by running the address search macro; the report tells us the chip answers to 0xb0 (write) and 0xb1 (read).

I2C>{0xb0 0×02 0b00011111 0b10000000}<–max prescaler
210 I2C START CONDITION
220 I2C WRITE: 0xB0 GOT ACK: YES
220 I2C WRITE: 0×02 GOT ACK: YES
220 I2C WRITE: 0x1F GOT ACK: YES
220 I2C WRITE: 0×80 GOT ACK: YES
240 I2C STOP CONDITION
I2C>{0xb0 1 0b11111111 0b11000000}<–max divider
210 I2C START CONDITION
220 I2C WRITE: 0xB0 GOT ACK: YES
220 I2C WRITE: 0×01 GOT ACK: YES
220 I2C WRITE: 0xFF GOT ACK: YES
220 I2C WRITE: 0xC0 GOT ACK: YES
240 I2C STOP CONDITION
I2C>

The DS1085 is almost exactly like the DS1077 we covered earlier, but has a DAC controlled oscillator for even steps between all frequencies. We programmed the clock to the slowest frequency using the commands shown above. The LED is dimmed by the pulse-width modulation effect of the clock signal.

LED at half brightness.

74F269 16bit synchronous counter, blink slowly (/65535)

We just programmed the CPLD with a logic OR gate similar to a 74LS32. Now, we’re going to reprogram the chip with a 16bit counter like two cascaded 74F269s.  At $1.15 each, two 74F269 Ics are more expensive than the XC9572XL CPLD. A 16bit counter rolls over once per 65535 ticks, so a LED attached to the last bit will toggle once every 65535/2 ticks.

Now we can see the cool part of CPLDs. The CPLD is like a programmable breadboard; we just popped out the 74LS32 and put in a 74F269, without buying parts, reading datasheets, etching, wiring, etc. A microcontroller connected to a CPLD can reconfigure its own circuit board to fix errors, add features, or re-purpose it for entirely different applications.

We upload the new design as before, but now the clock is divided by 65535 and the LED toggles about once per second.

Taking it further
Next time we’ll look at discrete 7400-series logic chips, and implement a ton of them in the CPLD to make a high-speed bus sniffer and logic analyzer.

Download: bitclone.v1.zip