Imagine a robot with an all-around bump sensor. The response to the bump sensor activating depends on the previous state of the robot. If it had been going forward, a bump will send it backwards and vice versa. This robot exhibits behavior that is easy to model as a state machine. That is, the outputs of the machine (motor drive) depend not only on the inputs (the bump sensor) but also on the current state of the machine (going forward or backward).
As state machines go, that’s not an especially complicated one. Many state machines have lots of states with complex conditions. For example, consider a phone switchboard. The reaction to a phone going off hook depends on the state of the line. If the state is ringing, picking up the phone makes a connection. If the state is idle, the phone gets a dial tone. The switchboard also has to have states for timeouts, connection failures, three way calling, and more.
If you master state machines your design and debug cycles will both move along faster. Part of this is understanding and part is knowing about the tools you can choose to use. I’ll cover both below.
Continue reading “Becoming a State Machine Design Mastermind”
Late last week, we saw a rather clever combination lock build that used only a single 74xx logic chip. [J. Peterson] read this post, and in a battle royale of geek one upmanship sent us a write up of the logic chip computer he built nearly 30 years ago at the University of Utah.
Around 1982 or 1983, [J. Peterson] took the Digital Hardware Lab at the University of Utah. The class was split into two semesters; during the fall semester, students would build a four digit, stack-based calculator that could add and subtract. That may sound easy, but everything – including reading the keyboard, multiplexing LEDs, and performing the mathematical operations – was done with gates and latches.
After Christmas break, the poor souls who had just finished their calculator were presented with another challenge due in four short months. The calculator built during the fall would turn into a full-blown computer, functionally similar to a PDP-8.
After months of work, and seeing the 70 people who showed up on the first day of class in September dwindle down to a handful in late April, [J. Peterson]’s computer was complete. The test program ran through a couple iterations, and the computer was immediately disassembled.
An awesome tale of digital design from only a generation ago. And you thought Verilog was hard.