The trials of digital design class

Late last week, we saw a rather clever combination lock build that used only a single 74xx logic chip. [J. Peterson] read this post, and in a battle royale of geek one upmanship sent us a write up of the logic chip computer he built nearly 30 years ago at the University of Utah.

Around 1982 or 1983, [J. Peterson] took the Digital Hardware Lab at the University of Utah. The class was split into two semesters; during the fall semester, students would build a four digit, stack-based calculator that could add and subtract. That may sound easy, but everything – including reading the keyboard, multiplexing LEDs, and performing the mathematical operations – was done with gates and latches.

After Christmas break, the poor souls who had just finished their calculator were presented with another challenge due in four short months. The calculator built during the fall would turn into a full-blown computer, functionally similar to a PDP-8.

After months of work, and seeing the 70 people who showed up on the first day of class in September dwindle down to a handful in late April, [J. Peterson]‘s computer was complete. The test program ran through a couple iterations, and the computer was immediately disassembled.

An awesome tale of digital design from only a generation ago. And you thought Verilog was hard.

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