This fractal viewer is a great way to get your feet wet with Field-Programmable Gate Arrays. The project will give you some experience working with video output, user input, and a whole bunch of math and memory management. [Hamster] built it using the Papilio Plus board which hosts a Spartan 6 FPGA. This continues his odyssey into the realm of hardware design; part of which we looked at back in December.

The arcade Megawing for the dev board gives him easy access to the controls needed to scroll and zoom on the fractal design. Calculations to generate the shape are being run at 240 MHz, with the VGA output running at 80 MHz. The device has enough horse power and SRAM to show an 800×600 pixel output with a 60 Hz refresh rate.

We really liked the logic diagram that [Hamster] drew up when planning how the calculations would be handled. It’s not overly complex, but it took us a while to conceptualize how everything fits together. It’s certainly an improvement from his last attempt as we couldn’t make heads or tails out of that flow chart.

If you’re just interested in the pretty shapes and colors there’s a demo embedded after the break.

We’re really not supposed to start a feature like this; but this hack is awesome. It’s a game of Snake implemented by an FPGA dev board. It uses a 16×16 LED matrix as the display and an SNES controller for input. So far it sounds like a very normal version of the game. But as you start to hear how it works in the presentation after the break you fall in love with what’s going on here.

First of all, it’s not written in VHDL — the predominant programming language for FPGAs. Instead, [Darrell] used the schematic-only approach to build the logic. Okay, that’s starting to get more interesting. As he continues to explain the circuit we get to see how the control input works (pretty simple since the SNES controller uses a parallel-to-serial shift register) and how the display is multiplexed. But the actual game logic is where things really take off. Each pixel in the display has its own individual logic circuit. Basically every cell is its own processor which reacts both to what is passed into it, as well as to a random seed. That seed system is called the ‘bucket brigade’ and passes a chance to spawn a piece of food from one cell to the next. All of this together makes for one simple game that is eloquently executed.

Last semester, [Peter], [Jared], and [Jeremy] took a course on embedded systems. They managed to turn out a very accurate copy of the classic Space Invaders in their class. Not wanting good code to go to waste, they decided to develop two player Space Invaders, and we wouldn’t mind testing it out.

The guys built their Space Invaders clone on a Virtex II dev board. Wanting a little more hardware development, they picked up a pair of RF trancievers so the two boards could communicate with each other. The rules of two-player Space Invaders is fairly simple; if you destroy an alien, there’s a 30% chance it will appear on your opponent’s screen. Hit the space ship that flies along the top of the screen, and 1 to 7 aliens will appear on the opponent’s screen. It’s a bit like two player Tetris where your victories bring about your friend’s downfall.

The guys put a really neat spin on an old game, and we’d love to try it out. Check out the guy on the left losing a game of Space Invaders to his lab partner after the break.

FPGAs are the bee’s knees. Instead of programming a chip by telling it what to do, FPGAs allow you to tell a chip what to be. Like everything though, a new skill set is needed to fully exploit the power of FPGAs. [Mike Field] decided to give back to the internet community at large and put up a crash course in FPGA design.

Right now, [Mike] has a couple of modules up that include subjects like binary math, busses, counting, and of course setting up the FPGA hardware. The recommended hardware is the Papilio One, although the Digilent Nexys2 is what [Mike] has been using so far.

We’ve seen a ton of awesome stuff that uses FPGAs, like the emulated Mac Plus, breaking HDCP, and an Ocarina of Time. [Mike]‘s tutorials look like a great starting point for some FPGA work. [Mike] is also looking for some feedback on his tutorials, so if you’ve got an idea of what he should cover be sure to drop him a line.

EDIT: The server was running on an FPGA and we can’t find a cache anywhere. If you’ve found a mirror, send a message. Apparently Amazon’s EC2 runs on an FPGA.

[Joe] and [Evan] wanted to have some fun with their FPGA course at Cornell. When faced with what to do at the beginning of the semester, they figured additive synthesis was a worthy pursuit. They ended up building the Ocarina of Time for their final project.

The guys started by recording a real ocarina and figuring out the relative power levels of each harmonic. Because any sound can be synthesized from a bunch of sine waves, having their Altera FPGA board replicate those frequencies produces a nice ocarina sound

[Joe] and [Evan]‘s ocarina has a ‘mouthpiece’ that is just a small microphone. This mic is hooked up to the FPGA board and controls the volume. Sadly, the guys didn’t have time to take apart an N64 controller so 6 red buttons serve as the finger holes.

From the video after the break, [Joe] and [Evan] really pulled together something that sounds like Link’s Ocarina. Great work, guys.

Who needs a tactile interface when you can wave your hands in the air to make music? Air String makes that possible and surprisingly it does so without the use of a Kinect sensor.

In the image above, you can see that two green marker caps are used as plectra to draw music out of the non-existent strings. Judiciously perched atop that Analysis and Design of Digital Systems with VHDL textbook is a camcorder recording an image of the player. This signal is processed by an FPGA (hence the textbook) in real-time, and shown on the monitor seen to the right. A set of guides are overlaid on the image, so the player knows where to pluck to get the notes she is expecting.

The program is designed to pick up on bright green colors as the inputs. It works like a charm as you can see in the video after the break. The team of Cornell students responsible for the project also mention a few possible improvements like adding a distance sensor (ultrasonic rangefinder?) so that depth can be used for the dynamics of the sound.

It’s been a little while since we talked about HDCP around here, but recent developments in the area of digital content protection are proving very interesting.

You might remember that the Master Key for HDCP encryption was leaked last year, just a short while after Intel said that the protection had been cracked. While Intel admitted that HDCP had been broken, they shrugged off any suggestions that the information could be used to intercept HDCP data streams since they claimed a purpose-built processor would be required to do so. Citing that the process of creating such a component would be extremely cost-prohibitive, Intel hoped to quash interest in the subject, but things didn’t work out quite how they planned.

It seems that researchers in Germany have devised a way to build such a processor on an extremely reasonable budget. To achieve HDCP decryption on the fly, the researchers used a standard off the shelf Digilent Atlys Spartan-6 FPGA development board, which comes complete with HDMI input/output ports for easy access to the video stream in question. While not as cheap as this HDCP workaround we covered a few years ago, their solution should prove to be far more flexible than hard wiring an HDMI cable to your television’s mainboard.

The team claims that while their man-in-the-middle attack is effective and undetectable, it will be of little practical use to pirates. While we are aware that HDMI data streams generate a ton of data, this sort of talking in absolutes makes us laugh, as it often seems to backfire in the long run.

[via Tom's Hardware]

Sure, [Stan] could have bought a nice full-frame DSLR like a Canon 5D or a Nikon D3, but where’s the fun in that when he could build his own digital camera? The build isn’t done yet, but [Stan] did manage to take a few sample pics.

The 14 Megapixel sensor [Stan] found was originally used for benchtop applications. There isn’t any reason it can’t be used for photography, so all that needed to be done was design a camera around this sensor.

[Stan] built his hardware around a DSP, an FPGA and a pair of ADCs, an amazing piece of engineering. Of course building a full-frame digital camera has as much to do with mechanics as electronics, so [Stan] used a 60mm cage system and a 3d-printed nylon enclosure.

Of course, [Stan]‘s camera doesn’t look much like and off-the-shelf DSLR. There’s a reason for this; the sensor in the camera has a rolling shutter, much like the last few iPhones instead of a focal plane shutter. Not a bad piece of work, we only wish there were more build pics.

[Thomas’] love affair with Commodore computers spans well over 30 years, and not too long ago he decided to recreate one of his favorite Commodore offerings, the PET. As we have seen with similar undertakings, this sort of project is no easy task, but [Thomas] seems to be making his way along nicely.

Using a Xilinx Spartan-6 FPGA on the Digilent Nexys3 dev board, he has implemented the Pet in Verilog. Like the original, his clone contains 16K of both ROM and RAM, utilizing the same simulated 6502 microprocessor he used on a previous Apple ][+ project. The FPGA version of the computer sports a 640x400 resolution which is twice that of the original, so [Thomas] simply doubled the size of each of the PET’s pixels to fill in the extra space.

[Thomas] has made some great progress so far, including the ability to load games and other programs from cassette images over a serial connection. He says that there are still a few loose ends to tie up, but it all looks good from here!

Continue reading to see a short video of Space Invaders running on he PET recreation.

[Mike] has been filling up a rather intense wiki entry outlining how to run uClinux on a DE0-nano FPGA board. This is an inexpensive dev board that will run you somewhere between $80 and $100. Right off the bat he goes into a hefty list of the reasons that this is a foolish activity. To name a few: Once you’ve complete the build the device will be tethered for reboot.  This board doesn’t have Ethernet hardware and TCP/IP is one of the beast features of the uClinux kernel. And the FPGA tools are closed-source, which doesn’t often mesh with the ideals of Linux developers. But we still like to see what it really takes to get these large-scope firmware builds to compile and load correctly.

After his preamble you’ll find three main chunks. The first deals with setting up the toolchain on Fedora 14. From there, he installs packages necessary for cross-compiling, pulls down the source packages, and gets to work. Once the kernel is compiled and running on the FPGA [Mike] goes on to show you how to build out a simple hardware add-on in the form of a couple of LEDs connected to extra FPGA pins. The final portion of the wiki details rolling support for toggling the LEDs into the software distribution.

[Steve] over at Big Mess O’ Wires has never been so happy to see the “Sad Mac” icon.

A little over a month ago, he decided to take on the task of building his own Mac clone using modern technology. Not to be confused with Mac emulation on modern hardware, he is attempting to build a true Mac clone using an FPGA that is functionally identical to the original.

He is calling his creation the “PlusToo”, with the goal of producing a modern version of the Macintosh Plus. The Plus shares a good amount of hardware with its other original Mac brethren, allowing him to replicate any of the other machines such as the Mac 128K, with a few simple configuration changes.

Building this clone is an incredible undertaking, and it’s a lot of fun to watch the construction progress bit by bit. [Steve] has been diligently working for a little over a month now, recently getting the clone to run 68000 code from the Mac ROM, resulting in the Sad Mac image you see above. While the logo has been dreaded among Mac users for years, it signals to [Steve] that things are coming along nicely.

[Mike Field] took what he had learned with a few past projects and combined them to make this FPGA-based SPDIF audio pass-through. In order to get the SPDIF signal ready for the FPGA he needed a few components to use for level conversion. Once everything was connected he used a first in first out (FIFO) buffer to ensure that the outgoing bitrate is the same as the input, while still allowing enough time for the FPGA to do some digital manipulation.

This reminds us of the NeTV, which is an HDMI pass-through device. That one allows you to overlay your own video information to any TV that has an HDMI port. This would allow you patch into any audio system that’s using SPDIF, letting you inject your own audio, such as a paging system in a public lobby, or the ringing of a phone when you get a call, or to create your own sounds.

We like his overhand knot cable management system to keep those jumper wires from becoming too much of a mess on the breadboard.

Check out the new set-top box on the block, the NeTV from Chumby Industries. That link will take you to their video demonstration of the device, which is a humble-looking black box with no apparent user interface. You’ll see a few cool tricks that may impress you, like pairing the device with an Android phone through the use of a QR code. Once the two have mated you can do things like share images on the TV and load webpages from addresses entered into the smart phone. There are options for scrolling alerts when you receive an IM or SMS, and a few other bells and whistles. All of this from a device which connects with two HDMI ports to sit between your TV and whatever feeds it a video signal. Read all about the features here.

But its the hacking potential that really gets our juices flowing. The developer page gives us a look inside at the Spartan-6 FPGA that lives in the little case. We don’t often quote [Dave Jones] but we’re certain he’d call this thing ‘sex on a stick’. They’ve made the schematic and FPGA information available and are just begging for you to do your worst. The power for the device is provided by a USB connection but curiously is just above spec when drawing a max of 700 mA. We have a USB port on the back of our TV and would love to velcro this thing in place and power it from that. What would you plan to do with it?

[via Reddit]

We’re always impressed with the number of laptop displays we’re able to pick out of the trash. Most of the time the computer is borked beyond repair so we end up with a lot of functional but unusable LCD panels. As a service to us all, [EiNSTeiN_] figured out how to control an LCD panel using a cheap homebrew FPGA board.

LCD panels don’t use a simple protocol like VGA for turning pixels on and off. Instead, the very high-speed LVDS is used. LVDS is beyond the capabilities of simple microprocessors, so [EiNSTeiN_] built himself a clone of an XuLA FPGA prototyping board and set to work. After figuring out the signal lines to the panel, [EiNSTeiN_] pored over the timing diagrams for the LVDS controller and the LCD panel. From the data sheets, he figured out data is usually sent to the panel at about 500 MHz. The homebrew FPGA board couldn’t manage that speed so [EiNSTeiN_] cut the FPGA clock in half.

While LCD’s 60 fps refresh rate was reduced to 30 fps, [EiNSTeiN_] says there’s only a little flicker. Not bad for something that could have easily been trashed.

In our hubris, we pat ourselves on the back when we’re able to pull data off our old SCSI drives. [Chris Fenton]‘s attempt to get an OS for a homebrew Cray-1 puts us rightfully to shame.

Last year we saw [Chris]‘ fully functional 1/10th scale Cray-1 supercomputer built around FPGA. While the reproduction was nearly cycle-accurate, [Chris] hasn’t had an opportunity to test out his system because of the lack of available Cray software. A former Cray employee heard of his plight and loaned an 80 Megabyte CDC 9877 disk pack to in the hope of getting some system software.

[Chris] acquired a monstrous 100 pound disk drive to read the disk pack, but after 30 years in storage a lot of electrical problems cropped up. Since reading the drive digitally proved to be an exercise in futility, [Chris] hit upon the idea of taking analog data straight from the read head. This left him with a magnetic image of the disk pack that was ready for some data analysis.

After the disk image was put up on the Internet, the very talented [Yngve AAdlandsvik] figured out the data, header, and error correction formats and sent [Chris] a Python script to tease bits from the analog image. While no one is quite sure what is on the disk pack provided by the Cray employee, [Chris] is remarkably close to bringing the Cray-1 OS back from the dead. There’s also a great research report [Chris] wrote as penance for access to the CDC disk drive. Any Hack A Day readers feel like looking over the data and possibly giving [Chris] a hand?