Fresh hacks every day
[Dave] noted that in a recent poll of FPGA developers, emacs was far and away the most popular VHDL and Verilog editor. There are a few reasons for this - namely, emacs comes with packages for editing your HDL of choice. For those of us not wanting to install (and learn) the emacs operating system, [Dave] got Notepad++ to work with these packages. Notepad++ already has VHDL and Verilog … [Read more...]
MyHDL is a Python module that brings FPGA programming into the Python environment. [Christopher Felton] tipped us off about a simple tutorial he just finished that gives an overview of how the module is used. You may remember hearing about PyCPU a couple days ago which can run very simple Python code on a FPGA. There was a healthy discussion in the comments section comparing PyCPU and MyHDL. … [Read more...]
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