lattice

35 Articles

A 60 GHz Phased Array

January 31, 2020 by 15 Comments

Our friend [Hunter Scott] gave a talk at a past Supercon about phased array antennas. He mentioned he was looking for collaborators to create an antenna with the SiBeam SB9210 chip. This is a specialized chip for WirelessHD, a more or less failed video streaming protocol, and it’s essentially an entire 60 GHz phased array on a chip with both transmit and receive capabilities. For $15, it seems like quite the bargain, and [Hunter] still wants to put the device to work.

The downside is that Lattice bought SiBeam and killed this chip — not surprising considering WirelessHD never really took off. However, [Hunter] says the chip was in some old smart TVs and laptops. If you can find replacement boards for those devices on the surplus market, you can get the chip and the supporting circuitry for a song.

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A Scratch-built RISC-V CPU In An FPGA

November 19, 2019 by 17 Comments

“RISC architecture is going to change everything”, which is why [SHAOS] is building this cool RISC-V DIY retro-style computer.

The project took inspiration from another hacker’s work in building a RISC-V emulator; shared in the Hackaday FPGA chat. He took it a bit further and got it going on an UPDuino v2.0 board which features a iCE40 FPGA from Lattice.

The board passes all the tests for the RISC-V subset he’s aiming for and even run some Zephry RTOS examples. He’s done a really good job of documenting how he got the code to run as well as many of the experiments he’s run so far. All the project files for ICEcube2 software are posted. It’s not the only RISC-V CPU we’ve seen in an FPGA, but the code is actually very clear and worth a read if you’re into such things.

We think anyone interested in duplicating his work could do so somewhat easily and start playing around with this increasingly popular architecture. Or at least get some LED’s blinking in an arcane but meaningful way. Video after the break.

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Symbiflow Open Source FPGA Toolchain

November 1, 2019 by 12 Comments

Anyone who’s ever had the pleasure of programming FPGAs knows that it’s a land of proprietary tools that almost require marriage level commitment to a specific platform to be effective. Symbiflow hopes to solve this by becoming the GCC of FPGAs.

Rather than a tool built around a specific chip or architecture, Symbiflow will provide a more universal interface.  Users can program in Verilog; architecture definitions define how the code will be compiled for the right chip. They are currently targeting the popular Xilinx 7-series, the very affordable iCE40 series from lattice, and the ECP5 FPGAs also from Lattice.

If you’re headed to Hackaday Supercon this year, [Timothy Ansell] will be giving a talk on how Symbiflow is making this process much more approachable and much less proprietary.  Overall we’re very excited about a common interface, especially as the price of FPGAs keep dropping into micro controller territory while also increasing in capability.

(Speaking of Supercon, and maybe this is a spoiler, the badge would not have been possible without Symbiflow, Project Trellis, Yosys, and NextPNR.)

RISC-V CPU Gets A Peripheral

November 26, 2018 by 15 Comments

One of the ways people use FPGAs is to have part of the FPGA fabric hold a CPU. That makes sense because CPUs are good at some jobs that are hard to do with an FPGA, and vice versa. Now that the RISC-V architecture is available it makes sense that it can be used as an FPGA-based CPU. [Clifford Wolf] created PicoSOC — a RISC-V CPU made to work as a SOC or System on Chip with a Lattice 8K evaluation board. [Mattvenn] ported that over to a TinyFPGA board that also contains a Lattice FPGA and shows an example of interfacing it with a WS2812 intelligent LED peripheral. You can see a video about the project, below.

True to the open source nature of the RISC-V, the project uses the open source Icestorm toolchain which we’ve talked about many times before. [Matt] thoughtfully provided the firmware precompiled so you don’t have to install gcc for the RISC-V unless you want to write you own software. Which, of course, you will.

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Icestorm Tools Roundup: Open Source FPGA Dev Guide

October 3, 2018 by 7 Comments

We like the ICE40 FPGA from Lattice for two reasons: there are cheap development boards like the Icestick available for it and there are open source tools. We’ve based several tutorials on the Icestorm toolchain and it works quite well. However, the open source tools don’t always expose everything that you see from commercial tools. You sometimes have to dig a little to find the right tool or option.

Sometimes that’s a good thing. I don’t need to learn yet another fancy IDE and we have plenty of good simulation tools, so why reinvent the wheel? However, if you are only using the basic workflow of Yosys, Arachne-pnr, icepack, and iceprog, you could be missing out on some of the most interesting features. Let’s take a deeper look.

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Three Part Deep Dive Explains Lattice ICE40 FPGA Details

September 27, 2018 by 15 Comments

It is no secret that we like the Lattice iCE40 FPGA. It has a cheap development board and an open source toolchain, so it is an easy way to get started developing low-cost, low-power FPGA designs. There are a few members of the family that have similar characteristics including the top-of-the-line UltraPlus. [Steve] from Lattice and [Michael Klopfer] from the University of California Irvine have a three-part video series that explain the architecture of the devices. Altogether, the videos are about an hour long and — of course — they use the official tools, not IceStorm. But it is still a great time investment if you have an iCE40 board and you want to understand what the chip has under the hood.

The first part is fairly short and talks a lot about applications. There’s also a nod to the hobbyist use of FPGAs. Keep in mind that the iCE40 FPGAs come in different sizes and variants, so don’t get excited when you see them mention a RISC-V — that isn’t going to fit in your iCEStick, that we know of. The iCEstick has a HX-1K onboard, which is the high-performance variant with 1,280 logic elements, as opposed to the low-power (LP) version.

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Learn FPGA Fast With Hackaday’s FPGA Boot Camp

August 6, 2018 by 36 Comments

FPGAs have gone from being a niche product for people with big budgets to something that every electronics experimenter ought to have in their toolbox. I am always surprised at how many people I meet who tell me they are interested in using FPGAs but they haven’t started. If you’ve been looking for an easy way to get started with FPGAs, Hackaday’s FPGA boot camp is for you. There’s even a Hackaday.io chat in the group specifically for FPGA talk for questions and general discussion!

While it is true FPGAs aren’t for everything, when you need them you really need them. Using FPGAs you can build logic circuits — not software simulations, but real circuits — and reap major performance benefits compared to a CPU. For digital signal processing, neural networks, or computer vision applications, being able to do everything essentially in parallel is a great benefit. Sometimes you just need the raw speed of a few logic gates compared to a CPU plodding methodically through code. We expect to see a lot more FPGA activity now that Arduino is in the game.

These boot camps gather together some of the material you seen spread over many articles here before, plus new material to flesh it out. It’s designed for you to work through more like a training class than just some text to read. There’s plenty of screenshots and even animations to help you see what you are supposed to be doing. You’ll be able to work with simulations to see how the circuits we talk about work, make changes, and see the results. We’ll focus on Verilog — at least for now — as it is close to C and easier for people who know C to pick up. Still not convinced? Let’s run though the gist of the boot camp series.

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