Will We Soon Be Running Linux On SiFive Cores Made By Intel?

June 25, 2021 by Jenny List 38 Comments

There’s an understandably high level of interest in RISC-V processors among our community, but while we’ve devoured the various microcontroller offerings containing the open-source core it’s fair to say we’re still waiting on the promise of more capable hardware for anything like an affordable price. This could however change, as the last week or so has seen a flurry of interest surrounding SiFive, the fabless semiconductor company that has pioneered RISC-V technology. Amid speculation of a $2 billion buyout offer from the chip giant Intel it has been revealed that the company best known for the x86 line of processors has licensed the SiFive portfolio for its 7nm process. This includes their latest and fastest P550 64-bit core, bringing forward the prospect of readily available high-power RISC-V computing. Your GNU/Linux box could soon have a processor implementing an open-source ISA, without compromising too much on speed and, we hope, price.

All this sounds pretty rosy, but there is of course a downer for open-source hardware enthusiasts. These chips may rely on some open-source technologies, but sadly they will not themselves be open-source chips as there will be plenty of proprietary IP contained within them. We can thus only hope that Intel see fit to provide the same level of Linux support for them as they do for their x86 ranges, and we’re not left in the same situation with respect to ongoing support as we are with so many other chips. Meanwhile it’s worth remembering that SiFive are not the only player in the world of RISC-V cores, so it’s likely that competitors to the P550 and its stablemates will not be far behind.

If you’d like a more in-depth explanation of the true open-source nature of a RISC-V chip, we’ve featured something on that theme before.

Header image: Gareth Halfacree, CC BY-SA 2.0.

Supercon Keynote: Megan Wachs Breaks Down RISC-V

January 27, 2020 by Elliot Williams 17 Comments

The 2019 Hackaday Superconference kicked off with a marvelous, and marvelously geeky, keynote talk on the subject of RISC-V by Dr. Megan Wachs. She is VP of Engineering at SiFive, a company that makes RISC-V processors in silicon, but the talk is a much more general introduction to the RISC-V open instruction-set architecture (ISA) and why you’d care. The short answer to the latter is the same reason you care about any other open standard: it promotes interoperability, reusable toolchains, and will result in us all having access to better and faster CPUs.

The video is embedded below, and it’s absolutely worth a watch. Unfortunately, The video is missing the first few minutes, you can follow along through her slides (PDF) and read through our brief recap below of what fell down the video hole.

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Building A RISC-V Desktop

February 11, 2019 by Brian Benchoff 15 Comments

If you want to talk about RISC-V, the Open Source instruction set for CPUs, you’re probably talking about microcontrollers. You can buy small but powerful RISC-V micros on par with an ARM Cortex-M4 right now. Deep in the pipeline are cores for something resembling SoCs, the kind you’d find in desktop NAS solutions, maybe a few routers, and smart TVs. This is great and all, but our idea of a ‘computer’ is still a desktop. When is the Open instruction set desktop coming? Well, it’s here right now. [Andrew Back] built a RISC-V desktop computer. It runs Linux, it comes in a case, it has HDMI and USB, there’s a graphics card in there somewhere, and it works. This is a desktop, running with a RISC-V core.

The core of this build is the HiFive Unleashed, a Linux-capable board from SiFive, makers of the first (production) RISC-V microcontroller. This board uses the Freedom U540 SOC built with a 28nm process, has 8GB of DDR4, and 32MB of Flash. For a board built on an Open archetecuture this is impressive, but it comes at a cost: the HiFive Unleashed ran for $1000 during its crowdfunding campaign.

But a board with an Open CPU does not a desktop make. You need peripheral IO, maybe a few PCIe, and hopefully a SATA interface. This problem has been solved by Microsemi with an Expansion board for the HiFive Unleashed. It includes a big ‘ol FPGA and all the connectors you could use. It also costs $2000.

With most of the parts ready to go, a few buttons, M.2 PCIe and SATA SSD storage, a graphics card, and a nice acrylic case were added. Thanks to Western Digital, building Linux was as easy as building Linux, and you end up with a desktop computer with a RISC-V brain.

Compared to a bog-standard ‘gaming machine’, this is an expensive build. The quick and dirty ballpark for the price is somewhere around $4000 USD for a machine that will let you check your Facebook. There’s a video of the machine running, you can check that out below.

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SiFive Releases Smaller, Lower Power RISC-V Cores

June 25, 2018 by Brian Benchoff 35 Comments

Today, SiFive has released two new cores designed for the lower end of computing. This adds to the company’s existing portfolio of microcontrollers and SoCs based on the Open RISC-V ISA. Over the last two years, SiFive has introduced a number of cores based on the RISC-V ISA, an Open Architecture ISA that gives anyone to design and develop a microcontroller or microprocessor platform. These two new cores fill out the low-power end of SiFive’s core portfolio.

The two new cores included in the announcement are the SiFive E20 and E21, both meant for low-power applications, and according to SiFive presentations, they’re along the lines of an ARM Cortex-M0+ and ARM Cortex-M4. This is a core — it’s not a chip yet — but since the introduction of SiFive’s first microcontrollers, many companies have jumped on the RISC-V bandwagon. Western Digital, for example, has committed to using the RISC-V architecture in SoCs and as controllers for hard drive, SSDs, and NASes.

The first chip from SiFive was the HiFive 1, which was based on the SiFive E31 CPU. We got our hands on the HiFive 1 early last year, and it is a beast. With the standard complement of benchmarks, in terms of raw power, it’s approximately twice as fast as the Teensy 3.6, based on the Kinetis K66, a 180 MHz ARM Cortex-M4F. The SiFive E31 is about 1.5 times as fast as the Teensy 3.6 on a pure calculations per clock basis. This is remarkable because the Teensy 3.6 is our go-to standard for when you want to toggle pins really really fast with a cheap, readily available microcontroller platform.

But sometimes you don’t need the fastest or best microcontroller. To that end, SiFive is looking toward a lower-power microcontroller based on the RISC-V core. The new offerings are built on the E2 Core IP series, with two standard cores. The E21 core provides mainstream performance for microcontrollers, and the E20 core is the most power-efficient core offered by SiFive. In effect, the E21 core is a replacement for the ARM Cortex-M3 and Cortex-M4, while the E20 is a replacement for the ARM Cortex-M0+.

Just a few months ago, SiFive released a gigantic, multicore, Linux-capable processor called the HiFive Unleashed. With support for DDR4 and Gigabit Ethernet, this chip would be more at home in a desktop than an Internet of Things thing. The most popular engine ever produced isn’t a seven-liter turbo diesel, it’s whatever goes into a Honda econobox; likewise, many more low-power microcontrollers like the Cortex-M0 and -M3 are sold than the newer, more powerful, and more expensive chips. Even though it’s not as exciting as a new workstation CPU, the world needs microcontrollers, and the more Open, the better.

Hackaday Links: April 8, 2018

April 8, 2018 by Brian Benchoff 7 Comments

SiFive raised $50 Million in funding. SiFive is a semiconductor working on two fronts: they want to democratize silicon prototyping, and they’re the people making the HiFive series of microcontrollers and SoCs. The HiFives are built on the RISC-V instruction set, a Big-O Open instruction set for everything from tiny microcontrollers to server CPUs. With RISC-V, you’re not tied to licensing from ARM or their ilk. Recently SiFive introduced an SoC capable of running Linux, and the HiFive 1 is a very fast, very capable microcontroller that’s making inroads with Nvidia and Western Digital. The new round of funding is great news for anyone who wants Open Source hardware, and the silicon prototyping aspect of it is exceptionally interesting. Great news for SiFive.

Guess what’s in just a few weekends? The Vintage Computer Festival Southeast. The VCFSE is Hotlanta’s own vintage computer festival, with a whole host of speakers, exhibits, and consignment to tickle those vintage dopamine receptors. On deck for the speakers is [Michael Tomczyk], one of the people responsible for the VIC-20, and [Scott Adams], no the other [Scott Adams], creator of adventure-style games for personal computers but not that adventure-style game. The exhibits will include Japanese retro computers, simulating an ENIAC and a mechanical keyboard meetup. If you’re around Georgia, this is an event worth attending.

Conference season is just around the corner, and you know what that means. It’s time to start ramping up for #badgelife. What is badgelife? It’s a hardware demoscene of electronic conference badges. This year, the badgelife scene has stumbled upon something everyone can get in on. Add-ons! They’re electronic hats (or shields, or capes) for all the badges. Physically, it’s a 2×2 pin header. Electronically, it’s power, ground and I2C. Want to prototype your own add-on? Good news, there’s a development board.

The Titius-Bode law states the semi-major axes of planets follow a geometric progression. The (simplified, incorrect) demonstration of this law states Mercury orbits at 0.25 AU, Venus at 0.5 AU, Earth at 1 AU, Mars at 2 AU, and continues to the outer planets. The Titius-Bode law is heavily discredited in the planetary science community, and any paper, talk, or manuscript is rejected by scientific editors out of hand. The Titius-Bode law is the planetary science equivalent of flat Earth conspiracy theories and Nazi moon bases; giving any consideration to the idea confirms you’re a moron. This week, some consulting firm posted something that is the Titius-Bode law on their blog. Why? So it could be submitted to Hacker News for that sweet SEO. This submission was upvoted to the top position, and is a wonderful springboard to argue an interesting point on media literacy. I posit the rise of news aggregators (facebook, twitter, digg, reddit, and HN), is the driving force behind ‘fake news’ as lay people become the gatekeepers. Prove me wrong.

The Department of Homeland Security has confirmed there are cell-site simulators (Stingrays, IMSI-catchers, or otherwise known as your own private cell phone base station) around Washington DC. It’s unknown who is operating these simulators, or even where they are. There are two things to read between the lines with this information: Duh, there are rogue Stingrays in DC. Holy crap duh. I bet there are also some around midtown Manhattan. You can buy the stuff to do this on eBay. Personally, I’ve found half a dozen Stingrays or other rogue cell stations this year (guess where?). Second, why is this a news item now? Is this a signal that the DHS will start clamping down on stuff you can buy on eBay? Hop to it, people; cellular hardware is a great way to make a liquid nitrogen generator.

SiFive Introduces RISC-V Linux-Capable Multicore Processor

February 3, 2018 by Brian Benchoff 39 Comments

Slowly but surely, RISC-V, the Open Source architecture for everything from microcontrollers to server CPUs is making inroads in the community. Now SiFive, the major company behind putting RISC-V chips into actual silicon, is releasing a chip that’s even more powerful. At FOSDEM this weekend, SiFive announced the release of a Linux-capable Single Board Computer built around the RISC-V ISA. It’s called the HiFive Unleashed, and it’s the first piece of silicon capable or running Linux on a RISC-V core.

The HiFive Unleashed is built around the Freedom U540 SOC, a quad-core processor built on a 28nm process. The chip itself boasts four U54 RV64GC cores with an additional E51 RV64IMAC management core. This chip has support for 64-bit DDR4 with ECC and a single Gigabit Ethernet port. Those specs are just the chip though, and you’ll really need a complete system for a single board computer. This is the HiFive Unleashed, a board sporting the Freedom U540, 8GB of DDR4 with ECC, 32MB of Quad SPI Flash, Gigabit Ethernet, and a microSD card slot for storage. If you don’t mind being slightly inaccurate while describing this to a technological youngling, you could say this is comparable to a Raspberry Pi but with a completely Open Source architecture.

News of this caliber can’t come without some disappointment though, and in this case it’s that the HiFive Unleashed will ship this summer and cost $999. Yes, compared to a Raspberry Pi or BeagleBone that is an extremely high price, but it has to be borne in mind that this is a custom chip and low-volume silicon on a 28nm process. Until a router or phone manufacturer picks up a RISC-V chip for some commodity equipment, this architecture will be expensive.

This announcement of a full Single Board Computer comes just months after the announcement of the SOC itself. Already, GCC support works, Linux stuff is going upstream, and the entire Open Source community seems reasonably enthusiastic about RISC-V. It’ll be great to see where this goes in the coming years, and when we can get Linux-capable RISC-V chips for less than a kilobuck.

SiFive Announces RISC-V SoC

October 4, 2017 by Brian Benchoff 33 Comments

At the Linley Processor Conference today, SiFive, the semiconductor company building chips around the Open RISC-V instruction set has announced the availability of a quadcore processor that runs Linux. We’ve seen RISC-V implementations before, and SiFive has already released silicon-based on the RISC-V ISA. These implementations are rather small, though, and this is the first implementation designed for more than simple embedded devices.

This announcement introduces the SiFive U54-MC Coreplex, a true System on Chip that includes four 64-bit CPUs running at 1.5 GHz. This SoC is built with TSMC’s 28 nm process, and fits on a die about 30 mm². Availability will be on a development board sometime in early 2018, and if our expectations match the reality of SiFive’s previous offerings, you’ll be able to buy this Open SoC as a BGA package some months after that.

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