[Tim] wrote in, lamenting a problem that many of us can likely echo. Over the years, he has acquired all sorts of small electronic parts and components, along with tools and accessories – all of which are starting to crowd his workspace. He says that most of his stockpile is being stored in a tackle box, but it’s getting unwieldy and he would like to find a better way to organize things.

Yours truly suffers from the same sort of situation. It’s mostly a result of being a tad bit lazy, while conveniently finding alternative storage containers for my electronic odds and ends. My workbench is strewn with plastic snack baggies (for screws, not ESD-sensitive bits), Glad-Ware containers, Eclipse gum packages, and old plastic baby formula tubs for larger items. While I’m certainly doing my share to reuse plastic packaging, I am aware that it’s not exactly the best organization methodology.

This topic does come up pretty often, and even though we’ve talked about it on several occasions, people still like to hear fresh feedback from their peers. If you have some clever organization tips, or a novel way of storing your electronics components, be sure to share them in the comments!

It’s been suggested that the first self-replicating computer virus was a single IC that eventually expanded into multiple plastic component storage boxes. Organizing components by their values is a huge PITA as well. Here’s some solutions we’ve found:

Photo Boxes

[Mathew] sent in his organization scheme that uses 4×6 photo boxes. Better get those boxes while they’re hot – we can’t remember the last time we used film.

Use a binder

This instructables uses binders for storage. Good for passives, but unless someone can find anti-static bags for a binder, we’ll keep our ICs separate.

The only way to organize resistors

[Johannes] stores his resistors on a sheet of styrofoam. The grid has the first color band on the left side and the second color band on the top. Extremely, extremely clever. We’re wondering why we Radio Shack didn’t come up with this in the 70s. The grid could be laid out on a log scale, though.

If Susan is lazy, why does she do all the work?

[D.C. Boyce] hacked up a couple of lazy susans, built frames out of 2x4s and mounted plastic component drawers on them. The result is probably more space than we’ll ever need. To keep things simple, he wrote a database program to keep track of everything.

Hack a Day reader [The_Glu] shared with us a project of his. He used an Eee PC 701 he had lying around with a broken LCD, along with three 1TB SATA drives to create a custom NAS server for his house. The server features a number of other interesting components, including USB2SATA converters to connect the hard drives, as well as a 2 line LCD to display RAID information and server status. The entire  project is wrapped up in a custom made Plexiglas enclosure with case fans to keep the whole thing cool. While this may not be the first Eee PC NAS, or the fastest, this is a wonderful way to repurpose a broken netbook. We also love the idea of netbooks being used more and more in projects like these as the first generation reaches its end of usefulness age. More pictures after the break.

Thanks [The_Glu]

Want 67 Terabytes of local storage? That’ll be $7,867 but only if you build it yourself. Blackblaze sells online storage, but when setting up their company they found the only economical way was to build their own storage pods. Lucky for us they followed the lead of other companies and decided to share how they built their own storage farm using some custom, some consumer, and some open source components.

Each pod is a standalone HTTPS-connected storage unit with 45 hard drives in it. Nine SATA port expanders connect to 4 SATA controller cards on the mainboard. The system boots from a 46th hard drive into 64-bit debian. Drives are running RAID 6 and using the Journaled File System (JFS). Our first thought when reading this was about the heat generated by those drives. A custom case houses all of this hardware and includes 6 big fans to take care of the cooling.

[Thanks Dave]

We’ve always felt that hard drive manufacturers were dirty crooks because of their use of fake math to make drives sound bigger than they actually are. Here’s a quick refresher for those who need it: Because digital information consists of 1′s and 0′s (two possible settings), digital architecture revolves around powers of 2. Long ago, when nomenclature was setup for measuring data the term kilobyte was adopted to represent 2 to the 10th power bytes (base 2, aka real math). The problem here is that 2^10= 1024 and when laymen hear the root “kilo” they think 1000 which is 24 byes less (base 10, aka fake math). So, if you have a 500,000,000 byte drive, base 10 math would call that a 500GB drive, but base 2 math would call that 476.8GB.

We understand why hard drive manufacturers use the base 10 system; larger sounding drives sell better. Now we find out that OSX 10.6 Snow Leopard is using base 10 math to calculate storage space. While base 2 math is the standard storage measurement for operating systems it may at first be difficult to understand why Apple would change to a base 10 system. But think about it once more, doesn’t Apple have a lot to gain if all the storage-containing-hardware they sell sounds bigger than it actually is?

[via Gizmodo]

Update: Force Snow Leopard to calculate storage in base 2 [via Gizmodo]

Microchip’s new 23K256 is a serially interfaced 32 kilobyte SRAM memory chip, available in 8 pin DIP and 8 pin SO packages. SRAM, like EEPROM, is a data storage medium. Data stored in SRAM is lost without constant power, but it’s really fast and there’s no limits to the number of write cycles. EERPOM stores data even without power, but it’s slow and usually limited to around a million write cycles.

32K SRAM chips typically have 15 address lines and 8 data lines, like the IS61LV256AL we used on our CPLD development board.  The 23K256 requires just four signal lines, but sacrifices the speed of a parallel memory interface. It’s a great way to add extra memory to a low-pin count microcontroller without routing 23 signal traces. We’ll show you how to interface this chip below.

Microchip 23K256, 32K SPI SRAM (Mouser search, Octopart search, $1.48). Datasheet (PDF).

We connected the 23K256 to our Bus Pirate universal serial interface tool as shown in the table. It’s very important to power the chip using only the Bus Pirate’s 3.3volt supply, the 23K256 isn’t rated for 5volts.

The Bus Pirate is an easy way to learn about a chip without writing any code, but the same principals apply to using the 23K256 with any microcontroller. This demonstration uses the latest version of the Bus Pirate firmware (26-FEB-2009), which you can download from our Google Code SVN.

HiZ>m <–choose mode
1. HiZ
…
5. SPI
…
MODE>5 <–SPI mode
MODE SET
… <–30KHz, all default settings
SPI READY
SPI>W <–capital ‘W’ enables power supplies
VOLTAGE SUPPLIES ON
SPI>

First, we put the Bus Pirate into SPI mode at 30KHz and chose the default settings for all options. We enabled the Bus Pirate’s on-board 3.3volt power supply with a capital ‘W’.

Configuration register

bit 7,6 = byte (00) page (10) sequence (01) mode
bit 0 = Hold disabled (1)

Data is stored inside the 23K256 in 1024 pages that each contain 32bytes. The scope of reads and writes is set by bit 7 and 6 of the configuration register. Storage can be accessed by the byte (00), by 32byte pages (10), or sequentially through the entire 32K (01).  We’ll work in sequence mode, which gives us access to read and write any length of data, anywhere in the 32K of storage space.

The hold pin is used to pause transfers when other chips on the same bus need to be accessed. Bit 0 of the configuration register controls the hold pin. When set to 1, the hold pin is disabled. We tied hold to ground for normal operation, but its functionality can be completely disabled by setting bit 0.

The configuration register is changed by sending the write configuration command (0b00000001) and the new settings.

SPI>[0b1 0b01000001] <–update config register
CS ENABLED
WRITE: 0×01 <–write config command
WRITE: 0×41 <–value to write
CS DISABLED
SPI>

We start an SPI transaction by enabling the 23K256 chip select line ([). We send the write configuration command (0b1, 0x01, or 1), followed by the new settings for the configuration register (0b01000001, 0x41). We set bit 6 for sequential access mode, and set bit 0 to disable the hold pin function. Bits 5-1 have no function, but the datasheet says to always write 0. The transaction concludes by disabling the chip select signal (]).

SPI>[0b101 r]
CS ENABLED
WRITE: 0×05 <–read config register
READ: 0×41 <–value read
CS DISABLED
SPI>

Next, we use the read configuration register command (0b00000101, 0b101, 0×05, or 5) to verify that the settings were properly written. This command returns one byte (r) which should match the value we wrote in the previous operation (0×41, or 0b01000001).

Data access

Now we can read and write data to the chip. Writes begin with the data write command (0b10, 0×02, or 2), followed by two bytes which determine where to write the data. The values to store are sent after the address. Depending on the access mode, a single byte, a page, or the entire memory can be filled in a single operation.

SPI>[0b10 0 0 1 2 3 4 5 6 7 8 9 10]
CS ENABLED
WRITE: 0×02 <–data write command
WRITE: 0×00 <–address byte 1
WRITE: 0×00 <–address byte 2
WRITE: 0×01 <–start of data to write
WRITE: 0×02
WRITE: 0×03
WRITE: 0×04
WRITE: 0×05
WRITE: 0×06
WRITE: 0×07
WRITE: 0×08
WRITE: 0×09
WRITE: 0x0A
CS DISABLED
SPI>

We start with the write data command (0b10) and set the write location to the beginning of the chip (0 0). We send a total of ten values to store, the numbers 1 to 10.

After writing the data, we can read it back with the read data command (0b00000011, 0b11, 0×03, or 3).

SPI>[ 0b11 0 0 r:10]
CS ENABLED
WRITE: 0×03 <–read data command
WRITE: 0×00 <–start address byte 1
WRITE: 0×00 <–start address byte 2
BULK READ 0x0A BYTES: <–read out 10 bytes
0×01 0×02 0×03 0×04 0×05 0×06 0×07 0×08 0×09 0x0A
CS DISABLED
SPI>

We send the read data command (0b11), followed by the address from which to start reading (0 0). We then read back 10 bytes (r:10). The 10 byte are the numbers 1 to 10, the same values we wrote in the previous step.

Like this post? Check out the parts posts you may have missed. Want to request a part post? Please leave your suggestions in the comments.

This Sony Vaio UX50 came with a 30GB hard drive from the factory. This hacker wanted to do an upgrade and move to solid state, so he started hacking away. He ended up with a total of 64GB of solid state storage crammed into the computer.  The hard drive was replaced with a 4GB compact flash drive and the rest is spread through out the device. Apparently any crevice or crack in the Sony UX50 can have memory shoved into it. He managed to somehow get 60GB of storage in there through various USB extensions and adapters. Notice the sticker on the inside of the case. Is this the latest fad? Decorating the inside of the unit where only you know it exists?

[thanks Jorn]

[Cory Doctorow] obtained access to a few data centers that deal in petabyte storage. The demand for data storage and processing doesn’t show any sign of stopping. It’s especially relevant when people need the resources to manage not only things like Google searches, but also email, customer transactions, and in the case of CERN, physics calculations. [Doctorow] drew an interesting conclusion from his experiences with the data centers; any innovation that the petabyte centers work on will eventually drift on down to the ordinary user, in laptop or desktop innovation. The petabyte center is easily duplicated with materials that are available for purchase to the average computer user; the only obstacles are price and space.

[via Boing Boing]