# The Hackaday Prize: A Ternary Computer

Bender: Ahhh, what an awful dream. Ones and zeroes everywhere… and I thought I saw a two.
Fry: It was just a dream, Bender. There’s no such thing as two.

- Futurama: A Head In The Polls, S02E07

The computer you’re using right now is simply just a highly organized state of electrons, commonly expressed in states of zero and one. Two? What is two? A ternary, or base-3, computer would be odd, disturbing, but nevertheless extremely interesting, making it a great candidate for The Hackaday Prize.

A base-3 computer isn’t a new thing, despite how odd it sounds. Moscow State University built a few dozen ternary computers named Setun back in the late 50s, and some research is being done using quantum computers and ternary arithmetic. Still, building a ternary computer from first principles – gates, truth tables, and transistors – isn’t something that’s done nowadays.

[ThunderSqueak] has been hard at work over the last few months working out the basic building blocks of her ternary computer project. She’s already figured out the basic NAND, NOR, and inverter structure that could be easily translated into assemblies made of discrete components or an IC mask.

A iDevice app, iCircuit, is being used to test out some larger circuits, using +5, -5, and 0 Volts to represent 1, -1, and 0. Going further, there are a few academic resources for constructing a ternary ALU and even ternary SRAM. While a homebrew ternary computer has little practical use, it’s an awesome example of the, ‘because it’s there’ engineering we’re looking for in a great Hackaday Prize entry.

The project featured in this post is an entry in The Hackaday Prize. Build something awesome and win a trip to space or hundreds of other prizes.

1. Everett says:
2. Rich says:

Or you could use 2 bits

• Hirudinea says:

If bit is short for binary digit then what is short for ternary digit, tit?

• Josh says:

In the literature on ternary computing a ternary digit is referred to as a trit.

• Making an 8-trit word a “trite”

• Richard says:

Yes, but wouldn’t you be more likely to organize your trits into 9-trit words (or some other power of 3)? That would allow you to use two trits to address the individual trits within the word.

OK, it’s true that binary computers have been built with 60 bit words, and other word lengths that were not powers of two (my first programming experience was on a CDC Cyber with 60 bit word length, 18 bit addresses, instructions of 15, 30, or 60 bits). But having the word length be a power of your fundamental base seems to be so much more elegant, and that’s what we’ve mostly settled on these days.

Of course, we’ve mostly settled on binary, too, but…

• Somun says:

• PodeCoet says:

This guy has the right idea!

3. Mystick says:

Yes… No… Maybe…

4. John says:

I am sitting well and truly in the “maybe” category on this one, insufficient data for meaningful conclusion.

• joee says:

I was sitting in the -1 category myself

5. NULL. Duh!

6. Joshua says:

I always wanted to try this, just for the sake of doing it.

• Greenaum says:

Trinary maths has been worked out, and it’s logic gates have had truth tables mapped, and descriptions made, for every possible gate, ie every possible combination of inputs and outputs.

There are websites where people design simple adders etc. And of course the Russian computers, since trinary has the small advantage of saving on components, useful when we were stuck with thermionic valves, not so much now there’s FPGAs and billions of transistors in a CPU.

It’s interesting for a while. Then it starts to look quite annoying, then you become grateful you’re not Russian and having to work on this 50 years ago. If you have to pick a base, stick with 2 or 10, really can’t see the point. I don’t think you can achieve much without a massive headache, or going native and seeing everything in threes.

It’s the sort of thing’d make you nostalgic for Octal.

• SavannahLion says:

It’s interesting you mention the number of transistors available. Aren’t modern chip dies beginning to use old transistor tricks of yore to squeeze more into the same space?

There’s a hard limit to what can fit into limited space. One can only lower voltages so often or so far. Software writers aren’t trimming their fat. So something has to give.

I could be wrong but couldn’t ternary logic potentially give computing the same boost as multiplecores? Hypothetically, could a ternary computer still have legacy support while giving an extra logic level to code that require it? Meh… just a thought.

• Greenaum says:

In the case of Flash memory, they already are doing this, each cell can hold a number of voltages, so can store more than one bit. I think they’re working on using 8 different levels at the moment.

• John says:

Binary is good for simple circuits but twelve is more sensible than all of them for ease of calculations. Ten is just antiquated and is about mainly because the French shout loud and still use their fingers and toes to count. :)

• Nobody says:

What’s wrong with that? You can count up to 1023 just using your hands :P

• Pat says:

Ternary logic has the advantage that its information encoding is as optimal as you can get (base ‘e’ obviously would be better, but 3 is the closest you get to ‘e’ with integers).

• Megol says:

Why would using trits be a problem on any level except the hardware one?
Some early programming systems used negative, zero and positive cases for conditionals and there trinary logic would be a good fit anyway.

7. DainBramage1991 says:

One of the more interesting articles on HAD recently.

8. okvi says:

Here’s a computer architecture description based on trits rather than bits: http://www.scribd.com/doc/78370674/Ternary-Computing-Testbed-3-Trit-Computer-Architecture

9. Ben Peddell says:

That ternary NAND gate looks a lot like a CMOS NAND gate, except with -VE instead of GND, and with JFETs instead of enhancement-mode MOSFETs.

Except that he appears to be basing his logic on enhancement-mode FETs instead of the normal depletion-mode JFETs.

With normal JFETs, the NAND gate as he has drawn would work as an OR gate, the NOR gate as he has drawn would work as an AND gate, and the inverter as he has drawn would act as a buffer.

To get a NOT gate, one would need to combine JFETs with MOSFETs – having the pJFET drive the pMOSFET, and having the nJFET drive the nMOSFET.

Unless one wants to rely on the off resistance of the JFETs, one would also need a resistor from the output to halfway between +VE and -VE (or one resistor from output to each of +VE and -VE) in order to hold the output at a known “maybe” value when not driven.

• Megol says:

He -> she.

10. I believe most high-density flash memories these days store more than one binary bit per cell, by assigning voltage ranges to represent states. There was one I recall that used quaternary storage internally (4 values per cell).

• Ben Peddell says:

Most MLC flash memories store 4 levels per cell. TLC flash stores 8 values (3 bits) per cell, and some high capacity SDHC and SDXC cards store 16 values (4 bits) per cell.

11. SuperNurd says:

If then statements just became quite a bit more complicated, If true… If false… If kinda maybe true…