Cornell Final Projects 2007

The latest crop of final projects from Cornell Universities ECE576 course went up a while ago. This round focuses on FPGAs. They’re all fairly impressive projects. My favorite is this real time spectrograph. With the decreasing cost of FPGAs, this Digital Oscilloscope could become a popular one. Putting this UDP network stack on a capture the flag network would probably freak out some people. Lately I’ve noticed a trend of replacing ASIC chips with FPGAs – these projects could be just the thing to get some people started with them.

11 thoughts on “Cornell Final Projects 2007

  1. lol, i’ve been planning on doing something similar to the real time spectrograph for quite some time now for audio, except using a lcd display (i swear hack-a-day has telepathic abilities :P)

    #1, is another great website for FPGA stuff. they have a ton of open source cores written in verilog/vhdl.

  2. We use the Altera DE2 boards as well at the University of Michigan in our ENGR 100 class. The idea is to design some sort of music synthesizer with an FPGA. Things got really interesting when one group made a Windows 95 interface clone with a music composer on this FPGA.

  3. As part of the group (well actually, exactly half) that designed the real-time speech pitch shifter mentioned above, I can tell you that complicated audio signal processing on these CycloneII FPGAs is a headache. In fact, (for a license fee) Altera provides you with a ‘megafunction wizard’ in Quartus which can generate cool things like an n-point FFT block. However, like all things Altera, the documentation on these blocks is insufficient to quickly integrate in to your project. If anyone figures out how to use the Altera FFT block please let us know!

  4. dpyatkov – I feel your pain. I think Altera doesn’t even know how a lot of their blocks work! The cores on are usually pretty easy to work with (I used an i2c core once, and it was a snap . . . anything with a wishbone interface really is). I think they even have FFT cores as well.

    twistedsymphony – I design my own processors in my free time occasionally, and I’ve been really pleased with one of the XSA-3S1000 boards from – It’s only like $200, and you can program it with a parallel port, so you don’t need an expensive JTAG programmer.

  5. I can definately recommend the fpga4fun shop ( I bought the Xylo-L and it is a really well thought out product, lots of example projects & source are provided and all the tools you will need to program the FPGA / ARM core (only drawback is windows only :P). They even managed a JTAG over USB solution for downloading files / debugging of ARM core.

  6. I really love your blog (for this, 24C3 links, etc. etc. you mad scener you.)

    But I don’t get it about running UDP only on a capture the flag network (aside, I assume, from the unplanned session cutoff thing.) Is it that one only gets one sort and number of UDP port (say) 80, hence very similar circumstances for all players (depending on what the user session ignores; WASD or packets)?

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