New Part Day: A RISC-V CPU For Eight Dollars

RISC-V is the new hotness, and companies are churning out code and announcements, but little actual hardware. Eventually, we’re going to get to the point where RISC-V microcontrollers and SoCs cost just a few bucks. This day might be here, with Seeed’s Sipeed MAix modules. it’s a RISC-V chip you can buy right now, the bare module costs eight US dollars, there are several modules, and it has ‘AI’.

Those of you following the developments in the RISC-V world may say this chip looks familiar. You’re right; last October, a seller on Taobao opened up preorders for the Sipeed M1 K210 chip, a chip with neural networks. Cool, we can ignore some buzzwords if it means new chips. Seeed has been busy these last few months, and they’re now selling modules, dev boards, and peripherals that include a camera, mic array, and displays. It’s here now, and you can buy one. If it seems a little weird for Seeed Studios to get their hands on this, remember: the ESP8266 just showed up on their web site one day a few years ago. Look where we are with that now.

The big deal here is the Sipeed MAix-I module with WiFi, sold out because it costs nine bucks. Inside this module is a Kendryte K210 RISC-V CPU with 8MB of on-chip SRAM and a 400MHz clock. This chip is also loaded up with a Neural Network Processor, an Audio Processor with support for eight microphones, and a ‘Field Programmable IO array’, which sounds like it’s a crossbar on the 48 GPIOs on the chip. Details and documentation are obviously lacking.

In addition to a chip that’s currently out of stock, we also have the same chip as above, without WiFi, for a dollar less. It’ll probably be out of stock by the time you read this. There’s a ‘Go Suit’ that puts one of these chips in an enclosure with a camera and display, and there’s a microphone array add-on. There’s a binocular camera module if you want to play around with depth sensing.

The first time we heard of this chip, it was just a preorder on Taobao. It told us two things: RISC-V chips are coming sooner than we expected, and you can do preorders on Taobao. Seeed has a history of bringing interesting chips to the wider world, and if you want a RISC-V chip right now, here you go. Just be sure to tell us what you did with it.

37 thoughts on “New Part Day: A RISC-V CPU For Eight Dollars

    1. There are very few reasons to jump in the first wave of a new part.
      – wait until someone more skillful has written the libraries/peripheral drivers. Remember: few people here do bare metal nor RTFM.
      – The price for new parts tends to drop over time and as more players enter the module market, i’ll drop more.
      – I would wait for the toolchain to get more mature/optimized. If you are on open source, wait until someone document how to build source code/download/debug.

    2. Probably not cheaper–when you get down to the RPi level, other parts of the BOM make it much more expensive than the silicon–but it will be more open. The RPi and every other SBC in existence has at least a small binary blob that makes it impossible to hack in entirely. A RISC-V SBC (which exists, though very expensive) could be FOSS all the way down to the silicon.

  1. Using this with a microphone array is very exciting, seems like someone good at DSP and ML could use TDOA (time difference of arrival) to make a spatial microphone, e.g. accurately measure location of something emitting sound, or filter out sounds not coming from the target area, etc. Seems like they may have made this chip with that in mind.

  2. I thought the whole point of RISC-V is that it’s open and we should be able to trust it, no blobs anywhere. I feel like that’s somewhat meaningless if the chips mysteriously appear from a supplier who seems inexplicably far ahead of the development curve.

    Who’s gonna be the first to decap this bad boy and get some SEM images of it? And then how much work is it to dismantle all that polysilicon scaffolding and figure out if we’re getting what we pay for, or just a very slight bit more?

    1. And that there is the main reason for why Open source makes very little sense for chips.
      There simply isn’t a way to reliably check the design and even if someone checks 1 chip, then that doesn’t state anything to be fair.

      Not to mention that any “modern” manufacturing node is far ahead of what would be considered reasonable to look at.
      Do remember, a Scanning electron microscope looks only at a very tiny area. Especially when working at high magnification. So it could take many days to just scan over the whole chip. Not to mention gently polishing it down for the next layer. (since electron beams only look at the surface.)

      Then reverse engineer those scans to see the logic, then reverse engineer the logic, while practically looking for a needle in a hay stack.

      It is simply expensive, slow, and requires a lot of technical experience to reverse engineer it within any reasonable amount of time. (Where that time likely could be in the order of many weeks.)

      Not to mention that RISC-V is under a BSD license, so the implementation that a manufacturer uses doesn’t have to be open source, or even documented.

      So all one is left with is a black box presenting the RISC-V instruction set architecture as its interface.

      An actual open source architecture with an open source hardware implementation would though fall under the same problem, checking would be a little easier if it uses an open source set of photomasks. Since then if it is different then the photomask, then it isn’t “safe”. But it would still take a long time to scan over the chip, not to mention a sufficiently good SEM is still expensive.

      And that testing 1 chip doesn’t say anything due to supply chain attacks being a very real thing. (even for fairly complicated closed source chips.)

      1. I don’t think think the purpose of Open Source was verifiability, nor was it to provide cheap stuff. Those are side benefits. The point of OS is that you have a legal avenue to copy, modify and distribute the “IP” that you use.

        To that end, RISC-V is exactly that. There is no legal barrier to taking the IP, and using it for whatever purpose (as allowed by licence). Obviously, when it comes to hardware, you need to pay to create the implementation, but that is a fact of hardware. You can’t have an Open Source licence that dictates that the implementation must be cheap for the user (who would pay ?).

        The benefit to the “average user” will appear indirectly, The cheapest chips are 8051 based, because the IP expired long ago. Give the Chinese a royalty free design, and they *will* undercut ARM, Intel etc in the long run. That will force a general lowering of prices. What people don’t realise when they pay $200 for an Intel chip, the cost of manufacture is cents.

        1. Yes, it is very hard and time consuming to check that a chip is manufactured “correctly”. So that obviously isn’t an advantage of RISC-V.

          Though, RISC-V is under a BSD license, so the hardware implementation is still protected IP of the manufacturer. (unless the manufacturer decides to be generous and give away either secrets for how to make good hardware logic design, and/or how to make their style of transistors. (Two things that effect the performance, power efficiency, not to mention manufacturing cost of the device.))

          The main thing in the production of chips that RISC-V will tackle is the development of the ISA, and the ISA is a fairly small portion of the overall architecture and hardware implementation of a chip. (And this R&D cost is usually not the big portion of the cost of making chips, the large portion of the cost is investments in tools and the maintenance of those tools. (not to mention the good old yield))

          So open source in terms of hardware will likely not remove anything from the end price. Especially in terms of RISC-V that is only the ISA, and not even close to a whole hardware implementation.

          In the end RISC-V is open source in a way that makes sense for chip makers, as in, the instruction set, and parts of the architecture of the device is set up in a way that makes cross compatibility easy. Enabling users to more easily switch over to their platform without investing heavily in software development. And I would not consider it surprising to see some hybrid systems in the future, like a processor with some RISC-V cores, and some X86 cores for an example.

          And the BSD license of RISC-V means that hardware makers aren’t required to share information of how they exactly implemented their chip, so it might actually take a fair bit of time before we see a cheap and legal clone. Though, I would also not be too surprised if a few low end (250+ nm manufacturing node) SoC with RISC-V starts cropping up a little here and there over the next decade. And that could be interesting.

        2. to produce a single chip it can costs few cents, but for sure to build the factory you need billions. usually to pass from nm X to nm Y with Y < X you double the price of the production pipeline. So there are fixed costs that must be amortized. secondly, and most important, take in count what kind of "bitter shark" Intel is: they want to squeeze till the last cent from your pocket. The trick is to stay 10 years behind and live by second hand PCs as i do: last time i bought a new PC was 2004. After that, i got second hand PCs from relatives, friends etc because for my needs (old games, internet, some light cad ecc) that harware is good enough (mastered by GNU/Linux) and i saved HUGE amount of money along the time.

      2. You are making a strawman. When ISAs, schematics and photomasks will be all open it will be easier for different foundries to make the same chip.
        Compared to the closed model it will be way more difficult to mount a supply chain attack or inject a backdoor and go undetected.

        > Not to mention that RISC-V is under a BSD license

        Yes, the absence of reciprocity is a problem and it will encourage closed hardware and freeloading. However, in future it might be possible to have implementations (schematics + photomasks) under reciprocal licenses.

    2. RISC-V is literally just an ISA – it’s up to hardware manufacturers on how they want to implement it. They are under no obligation to share implementation details. There *are* some constraints that imply a certain hardware configuration (for example, no branch delay slot), but you can weasel your way out of it with clever hardware design.

      The real advantage of RISC-V is the small instruction set, and the fact that there is an open-source compiler (and actual software!) for it. This makes it extremely attractive for hobbyists and research institutes, because it lends itself to low hardware design times, ie, achievable by a single person or small team. Modifications to include custom instructions are also supported, which is nice.

      IMO the whole ‘open-source’ thing doesn’t entirely make sense when it comes to an ISA, since it’s just an interface *mostly* decoupled from the implementation.

      1. Yes, RISC-V is as much computer architecture as HTML is a web browser. (To make a really rough comparison.)

        It is to a degree just an interface, and some rules for how it should behave. It lays down the foundation but leaves the rest of the construction to the manufacturer and end application. Though, I wouldn’t be at all surprised if new open source “building blocks” appear over time.

        And the creators behind RISC-V has stated that they have aimed at it being able to be implemented in a slew of different ways depending on the end application. And the fact that RISC-V is fairly open for manufacturers to add their own weird and wonderful instructions if they so desire, then this opens the door for a lot of interesting chips that all share the same basic interface.

        Where exactly all this goes in the future, who knows.

  3. Had the WORST experience with Seeed with £115 order – item never showed up, when I sought more info they fobbed me off to their courier, except even that was messed up as they gave phone number of one and tracking # format of another. Didn’t matter as courier refused to deal with me (rightly, they weren’t working for me!) Back and forth for weeks, ever iteration required a 48 hour delay (first day lost due to time difference and then they’d spend a day deciding what to say). So utterly unprofessional, it’ll take a long while before I consider them.

    Anyone else had better luck?

  4. It looks like this thing does meet the minimum requirements if you want to run Linux. Given that LWN featured a series of articles on running Linux on an even less provisioned chip, and this one appears to have an MMU and the right extensions, it seems perfectly possible.

    1. Thinking about it, there are wifi routers that get by with similar specs, so this thing should be practical for embedded linux. it won’t be running gnu tools, but it’s not like this thing would make a good build server. If you need the power of a pi, get a pi.

      Still this thing is cheaper than a pi and much easier to integrate onto a board than a raspi compute stick. It even has a ufl connector for wifi (through an esp8266) instead of a trace antenna. This thing was practically *made* to be integrated into devices as a linux system-on-module.

    2. Thinking about it, this thing won’t run gnu tools, but a lot of wifi routers get by with less. I won’t clam anyone should use this thing as a build server, and if you need a raspi, then you should get a raspi, but thing is cheaper than a pi and comes in a far more compact and easier to integrate package than a pi zero.

      I see this as a very affordable system-on-module that’s far easier to work with and integrate than a raspi compute stick, and it even has a ufl connector instead of a trace antenna. It’s practically *begging* to be integrated into a range of robots and 3D printers and stuff as an embedded linux system.

  5. The neural network ASIC stuff is potentially promising, depending on what you can actually do with it.

    Say, relatively fast vision inference in an embedded system with low power?

    Nobody is really offering anything in that space except Movidius, and it’s half a million bucks to get a foot in the door.

  6. Well it’s not ready for prime until the errata sheet, docs and software are place for hackers to make use of it. Until then it’s just little more than silicon not ready for public release.

    Even then who is the target audience? It’s going to be small. The Ardunio folks don’t need it. Even with documentation it’s going to be a tough slog to understand such a device. If anything defines modern microcontrollers and processors is their complexity. Databooks several thousand pages long are the norm. This isn’t your dad’s 68008 or 65c02.

    1. Max 640×480 resolution for the camera, but i thought 3D printer controller as well. The camera thing could still be used as a secondary way of automatically(and manually) supervising the printing, but making the models could be a pretty daunting task.

      Although without integrated wifi, why not just use ESP32 with some I/O extender.

  7. I was really interested in learning more about the 64/128/256/512 point FFT/IFFT hardware inside the Kendryte K210 processor used above. But all the heavy duty, low level, documentation is only available in Chinese (for now) – . There is a datasheet in English. So I either need to learn Chinese or wait on the released of full documentation in English – using online translation tools on highly technical documentation is just asking for constant headaches.

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