![[Dr Ali Shirsavar] drawing schematics and equations on the whiteboard](https://hackaday.com/wp-content/uploads/2026/01/Biricha-caps-banner.jpg?w=800)
[Dr Ali Shirsavar] from Biricha Digital runs us through How to Select the Perfect Output Capacitor for Your Power Supply. Your switching-mode power supply (SMPS) will require an output capacitor both to iron out voltage swings due to loading and to attenuate ripple caused by switching. In this video we learn how to calculate the required capacitance, and when necessary the ESR, for your output capacitor.
To begin [Dr Ali] shows us that in order to calculate the minimum capacitance to mitigate voltage swings we need values for Δi, Δv, and Ts. Using these we can calculate the minimum output capacitance. We then need to calculate another minimum capacitance for our circuit given that we need to attenuate ripple. To calculate this second minimum we need to change our approach depending on the type of capacitor we are using, such as ceramic, or electrolytic, or something else.
When our circuit calls for an electrolytic capacitor the equivalent series resistance (ESR) becomes relevant and we need to take it into account. The ESR is so predominant that in our calculations for the minimum capacitance to mitigate ripple we can ignore the capacitance and use the ESR only as it is the feature which dominates. [Dr Ali] goes into detail for both examples using ceramic capacitors and electrolytic capacitors. Armed with the minimum capacitance (in Farads) and maximum ESR (in Ohms) you can then go shopping to find a capacitor which meets the requirements.
If you’re interested in capacitors and capacitance you might enjoy reading about Measuring Capacitance Against Voltage and Getting A Handle On ESR With A Couple Of DIY Meters.
Electrolytic Capacitor ESR increase due to electrolyte evaporation. Related to temperature. EoL is generally 2X initial ESR. Electrolytics seem to be weak point of any design. A well documented example is Enphase… the company most widely associated with early‑generation microinverter failures caused largely by electrolytic capacitor aging, and they went through multiple redesign cycles and warranty waves before stabilizing reliability. Bathtub curve problem. Still uses electrolytics, but with improved thermal design and lower ripple stress. Derating and thermal design are everything.
Seventeen minutes Well Spent.
Thanks HAD.
pleased to hear it! thanks!
Worked on mpdems that typically run at 70degC internal temperature. When servicing the returned failed units after tupically 5 years or more it was often found that electrolytics had dried out. They are the weak point in any long life relatively high temperature design.
How many USB outputs integratwd into mains wall sockets will still work in 30 years time?
By then a new standard will have arrived.
Use low loas MLCCs with a self resonate frequency as close to your switching frequency for your bulk capacitance. Then you want a small physically sized (but high in capacitance) NPO class cap with the shortest return path you can get from the switch output to ground. This small cap keeps the loop inductance low and reduces switching noise spikes.
Layout of switch mode power supplies is very important. One that is laid out right will be efficient, have a low ripple output, and emit little EMI noise.
MLCC’s suffer fairly high aging rates, some with in the first 24 hours so datasheet specs are misleading. EE’s are oblivious to such things. Some manufacturers are putting the aging rate number stashed someplace ont he datasheet.
At mains frequency, I always used 470-1,000uF per amp as a rule of thumb, which seems to do well with SMPS lol.
Well it’s within any time frame, really. Typically aging goes as percent per log(time), with -20% over a typical product lifetime (1-10 years) being common for X7R types, I think it was?
If you get the higher density types (Z5U etc.), aging is proportionally worse, as is drop due to DC bias, and (as the code suggests) temperature sensitivity. There’s really almost no reason to use those; X7Rs these days are already made with such thin layers that a “25V” part can be -90% C at 10V.
AFAIK, temperature, C(V) and aging track independently, i.e. total capacitance C can be decomposed into factors due to each parameter, C(V, t, T) = Co * Cv(V) * Ct(t) * CT(T).
Takeaway: nameplate ratings are meaningless. What matters is energy storage, which tracks with package size, but can always be less (e.g. fewer layers than fills up the internal volume). The only thing you can know is the C(V) curve, when they provide it at all (and if they don’t, run away).
Regarding mains frequency storage, something like 2mF per ampere is reasonable, at 12V, 100Hz. Note that it’s inversely proportional to voltage and frequency, because 1 or 2V ripple matters a lot at 12V but makes things a whole lot worse (small conduction angle) if it’s say 320VDC, or more. As frequency goes up, (electrolytic) ESR takes over, and capacitance tends to large values to keep ripple current ratings adequate.
This illustrates the problem with rules of thumb: the context, constraints and approximations that gave rise to them, cannot possibly fit on a thumb. They’re neatly-packed memes of misinformation. Rules of thumb are at best dangerous to use directly. A better perspective is as a guide, a starting point, from which to dig in and understand the underlying problem. A rule is never an excuse to avoid work — even if the work finds nothing special under the application conditions, now you’ve proven it to be the case, and that’s actual engineering, not some copy-paste effort.
X7R or X5R caps have a lower dissipation factor than Z5U. This reduces ripple and improves efficiency.
My experience with electrolytic caps in switch mode supplies has not been good. Current spikes tend to degrade them much much quicker than ordinary ripple currents.
The video explains how to calculate the minimum required capacitance and the maximum ESR (for electrolytic cap) for the output capacitor. But are there any maximum capacitance and minimum ESR not to overcome, and if so, what are the possibly bad consequences?
If not, it would mean that taking a very big capacitance, in the best series of capacitor available (very low ESR, high temperature, long life) would be at the same time the most efficient (very low dip and very low ripple) and long term reliable solution. Of course mass manufacturers would not go this way to minimize cost and maximize profits, but as individuals we could certainly afford to replace a few capacitors in our SMPS to upgrade them.
i´m no expert but i´ve come across cheap converters that don´t like huge capacitive loads, some high quality dc-dc converters explicitely tell you in the datasheet not to connect to a certain and greather tan X capacitante at the output, i guess because the Control loop of the converter would register a error since he can´t get the output voltage to the desired leven in a certain time so it registers that as a failure scenario.
other than that, if you are designing your supply, i guesse the merrier the better but there are practical limits, also, when you connect your power supply to a load, the energy stored in the caps will dump fast in the load, at my company, one client asked us to build a extremely low output capacitante power supply, the unit supplies 300A at 40V with a ripple ridiculously low and PPM precision levels ( particle accelerator magnet supplies) so it can be done, but oh boy, at what cost.
Yes some control loops get unstable with too much or too little capacitance.
Minimum ESR depends on control compensation.
Voltage-mode controllers generally require controlled ESR, to insert a zero in the transfer function, pulling back any possible phase margin from the LC filter. Even so, controller cutoff frequency is near or below LC cutoff. Ye olde ATX PSU had a forward converter with voltage-mode control (TL494 et al), and might run at Fsw = 40kHz, LC cutoff of a few kHz, and so the capacitance required is quite large (~10mF).
Current-mode controllers can operate above the LC cutoff, so don’t need as much capacitance for the same output impedance, and offers better PSRR. Compensation can accommodate ESR down to zero, making ceramics practical.
Anything with a control loop is applicable. Always check linear regulators for C/ESR range (and ADJ/GND pin current in dropout, another easy gotcha). They tend to omit it these days as “ceramic stable” types have been available for a while, but actual data is exponentially better than some nod in the marketing headline.
Polymer electrolytics tend to have very low ESR, though they’re available in a range. They’re very similar to film caps actually, but for proportionally lower voltages (you’re hard pressed to find films below 100 or 50V, and in values more than a few µF) and higher capacitances. This is good for ripple current handling, but means you don’t want to simply replace electrolytics with them; the low ESR further encourages series resonances in the PDN (power distribution network), between trace inductance and other low-ESR (ceramic) bypasses.
Maximum capacitance tends to be due to startup conditions; a hiccup-mode protection for example might not achieve stable output voltage if the output is loaded with too much capacitance. Maybe it catches on the next pulse or two, but if the load is heavy or starts up after one pulse, discharging that capacitance inbetween, well, it’s just gonna sit there ticking away forever.