Binary Clock Using Logic Chips And Mains Frequency

[Osgeld] built himself a binary clock. He didn’t take the time to explain his project, but he did post beautifully hand-drawn schematics and pictures of the circuit (PDF) as he was building it. We’ve seen clock projects that use mains frequency as the clock source and that’s the route that [Osgeld] chose for his build. He started with a 9-12V AC wall wort as a power input. From there it’s just a matter of using a bridge rectifier to convert to DC, then a 7805 linear regulator to establish a steady 5V rail. A resistor and a couple of diodes allow him to pull the 60 Hz frequency off of the incoming AC, and then use a combination of 4000 and 7400 logic chips to count the pulses and keep track of the time.

29 thoughts on “Binary Clock Using Logic Chips And Mains Frequency

  1. Binary Clock Noun * S: (n) an example of a perfectly usable device rendered unusable. This extremely easy to create device is typically built in order to impress people, look smart, and more importantly, hard core.
    See also: fitting square wheels on a car (making it unusable), web/wifi devices that need attendance to at least collect the product created (e.g. toaster, coffee machine), etc.

  2. Osgeld, haha I suppose it was the 74HC595 or am I wrong? I actally have a whole bunch of them and use them quite frequently. I’ll be posting an interesting project to HoD this month where I made some nifty with a bunch of 595’s and the second best IC evermade, the 74HC123.

  3. Nice drawing! good work there , Osgeld.

    I’m no EE, but I suspect that the zener alone will build up a small charge (like a capacitor) during the positive half cycle of the AC while its conducting. Then, at the zero cross-over into the negative half cycle, the zener is forward-biased like a normal diode and there’s an in-rush of current into the negative half-cycle while all those holes and electrons (previously in avalanche) return to the standard depletion zone of the PN junction and the zener tries to behave like normal diode again. Thus, switching takes too much time, and your ground rail will bounce (spike) at each zero-crossing. The spikes probably killed your regulators. The normal diode doesn’t have this problem and conducts normally and quickly on the negative half cycle. One improvement I can suggest here.. replace R1 with D1 to present only the positive half cycles to your zener. Put R1 in series with your zener, after D1. Your circuit is basically a Full bridge in parallel with a half-bridge. It’s better to separate the full bridge from the half-bridge.


  4. Looks like a student of Forrest M. Mimms III, at least as far as the drawing goes.

    But please, it’s a wart, not wort. You use wort to make beer with, not electronics (although I often drink beer while designing and working with electronics).

  5. without the details that is what I was showing on my scope codeboy, and good suggestion about swapping R1 and D1, it makes since

    honestly I am surprised about all the comments on my schematic, every project I have posted that has had one was done in the exact same style, but whatever heh

  6. I think the point he was making is: Does anyone actually glance at a binary clock to read the time from? Sure, you CAN do it, but why? You CAN put square wheels on a car, but it doesn’t make it better.

    I don’t have any negative comments on the build itself, only a vague wonder why one would use such a device.

  7. I wear a binary watch and can read it easily and quickly. It’s really not that difficult. Heck, I had the battery changed at a watch place in a mall just before Christmas, and the girl running the place even set the time for me even though she’d never seen a binary watch before. It must be you.

  8. Awesome project! I had intended to do something similar, and use the mains frequency to drive a timer for something else, but during research I found that the mains frequency isn’t that great at keeping time. The 60Hz is only nominal, and power stations will speed up or slow down their generators fractionally to cope better with demand, so in reality the mains frequency will go slightly above 60Hz (say 60.5 Hz) during the day, and lower than 60Hz during the night when demand is lower.

    Of course, this means the clock would run a few minutes fast during the day and then a few minutes slow during the night, but at the end of the day (literally), the slow period and fast period might cancel out somwhat, and you might only be off by a few minutes a month. But for my own project this kind of error was not good enough, and in the end, just went for a 32kHz crystal and RTC IC – dirt cheap, easy to use.

  9. andar_b, you are totally missing the point here, buddy. It’s an interesting project, because of the synchronisation mechanism. It is also an exercise in both digital electronics and AC. I’m sure no one is ever planning to use it as a real clock. And I’m sure you know that pretty well, but somehow you still insist to add a total pointless comment to the list.

  10. @Mike there is no way stations increase or decrease mains frequency to manage load capacity, at first it do nothing to load capacity and at second they required to keep everything in sync with national grid or transformers will melt down so grid is precise to atomic clock unless you see smoke and fire around city

    1. I don’t why mains frequency changes, I only know it does. Greatly. Anywhere from 65Hz down to 55Hz. I can see it change on my UPS. And, I have a frequency counter that uses mains frequency, and it’s the most unreliable frequency counter in my shack.

  11. @therian

    Half true. Frequency does in-fact have a relationship with load. If demand is greater than generation, the frequency falls while if generation is greater than demand, the frequency rises. This is due to the response time of generation units. If the load spikes, the generators will slow down before the system can increase the ‘throttle’ to the unit to make up for it. Steam generators are the worse, because the slow thermal response. The converse is true when load falls, generators will over-speed.

    The grid is considered ok if ‘the daily average frequency’ is within 10 seconds of proper time which is no where near ‘atomic’ accuracy. The error is additive, and over time can become large.

  12. @therian on further research, I only agree with one of your points. It turns out that I had it backwards – a drop in frequency is caused by the rise in demand (as opposed to raising the frequency to meet demand). But this still causes a discrepancy in timing.

    However, you are totally wrong to say that the grid is precise to atomic clock. From the article “NAESB WEQ Manual Time Error Correction Standards – WEQBPS – 004-00”, the introductory paragraph states:

    “Interconnection frequency is normally scheduled at 60.00 Hz and controlled to that value. The control is imperfect and over time the frequency will average slightly above or below 60.00 Hz resulting in mechanical electric clocks developing an error relative to true time. This Standard specifies the procedure to be used for reducing the error to within acceptable limits of true time.” source:

    This doesn’t change my original conclusion though – a mains drive clock would be inaccurate in the short term over one day (the NAESB allows mains-clocks to be wrong by up to 10 seconds before applying correction in the East US), and therefore unsuitable for my project.

    1. In the UK, the frequency is (relatively) tightly controlled. I built one of these using large seven-segment displays and it ran for weeks without drifting noticeably. Amusingly, since it possessed a tenth-of-seconds display it was always much more precise than it was accurate, which was my deliberate joke :)

      There’s some info on mains stability here:

      I used CMOS chips with a very high input impedance in the first counter stage of my clock, which had the interesting result that I could run the whole thing off a DC supply and simply attach a short wire antenna to the clock input – there was enough radiated signal coming out of the wiring in the walls to reliably clock it. After dividing by 5 (since we use 50Hz here) I simply cascaded a bunch of 40110 seven-segment-decoded up/down counters using ULN2003A drivers and included some discrete logic to roll over at the appropriate intervals (mod 60, mod 60, mod 24). Should really write it up one of these days!

  13. I am thinking of building something similar to this but with 7-seg units. I was wondering if you had any noticeable problems with the “dirty” clock signal. I was thinking about adding another chip that had schmidt trigger inputs because that would be cleaner but I don’t know if the extra chip is really needed.

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