Join us on Wednesday, September 16 at noon Pacific for the CNC on the SkyWater PDK Hack Chat with Tim “mithro” Ansell, Mohamed Kassem, and Michael Gielda!
We’ve seen incredible strides made in the last decade or so towards democratizing manufacturing. Things that it once took huge, vertically integrated industries with immense factories at their disposal are now commonly done on desktop CNC machines and 3D printers. Open-source software has harnessed the brainpower of millions of developers into tools that rival what industry uses, and oftentimes exceeds them. Using these tools and combining them with things like on-demand PCB production and contract assembly services, and you can easily turn yourself into a legit manufacturer.
This model of pushing manufacturing closer to the Regular Joe and Josephine only goes so far, though. Your designs have pretty much been restricted to chips made by one or the other big manufacturers, which means pretty much anyone else could come up with the same thing. That’s all changing now thanks to SkyWater PDK, the first manufacturable, open-source process-design kit. With the tools in the PDK, anyone can design a chip for the SkyWater foundry’s 130-nm process. And the best part? It’s free — as in beer. That’s right, you can get an open-source chip built for nothing during chip manufacturing runs that start as early as this November and go through 2021.
We’re sure this news will stir a bunch of questions, so Tim Ansell, a software engineer at Google who goes by the handle “mithro” will drop by the Hack Chat to discuss the particulars. He’ll be joined by Mohamed Kassem, CTO and co-founder of efabless.com, and Michael Gielda, VP of Business Development at Antmicro. Together they’ll field your questions about this exciting development, and they’ll walk us through just what it takes to turn your vision into silicon.
Our Hack Chats are live community events in the Hackaday.io Hack Chat group messaging. This week we’ll be sitting down on Wednesday, September 16 at 12:00 PM Pacific time. If time zones baffle you as much as us, we have a handy time zone converter.
Click that speech bubble to the right, and you’ll be taken directly to the Hack Chat group on Hackaday.io. You don’t have to wait until Wednesday; join whenever you want and you can see what the community is talking about.
So, I had to get to the middle of the 3rd paragraph to find out what PDK meant!
So , empty documents, and “code of conducts”. good to know. If I need a chip that needs documents or code of conducts, I know where to go. For basic cells, flops, latches, pads, LVS, DRC, ERC rules, not so much.
You didn’t search a lot: https://foss-eda-tools.googlesource.com/skywater-pdk/libs/
He did. The DRC, LVS, and PEX directories are all one-line placeholders “TODO: xxx”.
This is not a “PDK”. It’s an invitation to upload some verilog instead of using an FPGA.
Hey, Bill, how’re things?
640 KB still enough for everyone?
So, if one actually recurses submodules, you can find:
GDS2, LEF, Verilog Sim, Verilog Black Boxes, Verilog Behavioural, Verilog Functional, and timing models in “JSON” format, which are actually Synopsys “Liberty” format, TLF files, SPICE Netlists, and almost everything required for RTL2GDS2.
Now, all we need are some good free synthesis tools, timing tools, test insertion tools, ATPG tools, LVS, DRC, ERC, tools, and we are all set!
Simulation is actaully one thing almost well covered.
Hi,
VHDL could come soon, I just have to hack my http://libregates.org files (currently targetting only Actel’s ProASIC3) and I can create a new family of gates.
“We’ve seen incredible strides made in the last decade or so towards democratizing manufacturing. Things that it once took huge, vertically integrated industries with immense factories at their disposal are now commonly done on desktop CNC machines and 3D printers.”
Still do, because the new technologies aren’t good at putting the “mass” in mass production.