A central processing unit, or CPU, is the heart of any computer system. But it’s definitely not the only part: you also need RAM, ROM and at least some peripherals to turn it into a complete system that can actually do something useful. Modern microcontrollers typically have some or all of these functions integrated into a single chip, but classic CPUs don’t: they were meant to be placed on motherboards along with dozens of other chips. That’s why [c0pperdragon]’s latest project, the SingleBreadboardComputer, is such an amazing design: assisting its 6502 CPU are just four companion chips.
The entire system takes up just one strip of solderless breadboard. Next to the CPU we find 32 KB of SRAM, 32 KB of flash and a clock oscillator. The fifth chip is a 74HC00 quad two-input NAND gate, which is used as a very tiny piece of glue logic to connect everything together. Two of its NAND gates are used for address decoding logic, allowing either the ROM or RAM chip to be selected depending on the state of the CPU’s A15 line as well as blocking the RAM during the low phase of the system clock. The latter function is needed because the address lines are not guaranteed to be stable during the low phase and could cause writes to random memory locations.
The remaining two NAND gates are connected as an RS-flipflop in order to implement a serial output. This is needed because the CPU cannot keep its outputs in the same state for multiple clock cycles, which is required for a serial port. Instead, [c0pperdragon] uses the MLB pin, normally used to implement multiprocessor systems, to generate two-clock pulses, and stores the state in the flipflop for as long as needed. A few well-timed software routines can then be used to transmit and receive serial data without any further hardware.
Currently, the only software for this system is a simple demonstration that sends back data received on its serial port, but if you fancy a challenge you could write programs to do pretty much anything. You could probably find some inspiration in other minimalist 6502 boards, or projects that emulate a complete motherboard in an FPGA.
https://content.thetechnickel.com/misc/fc6502/fc6502.png
This wouldn’t fit on a single breadboard. No IO either…
I’m not much into this sort of projects, but I do want to make a comment about the text labels.
I’ve tried this too, and it’s not so easy to write text that small and still eligible. After a bit of experimenting I started making such labels with a spreadsheet.
* Type in the text in two columns.
* Set the row height to 2.4mm.
* Decrease font size untill it looks good.
* Use Left and Right justification for the left and right pin rows.
* Print it on paper.
* Glue it to the IC.
* Optionally put some sticky tape on top.
* As a last step, use a knife to cut off excess paper along the side of the IC.
Those printed text (with my laser printer at least) are much crisper then pen writings. I have even made some labels with a pitch of 1.27mm this way to put on flatcables. When glueing with hot glue you can fill out unevenness easily, and it stays flexible. Hot glue is hot enough to damage sticky tape though so some experimentation may be required.
Yes, the labeling on the CPU is really a bit of a mess. It is probably even worse than you think, because I had no proper stickers at the time and used multiple tiny patches that are normally used to cover spelling mistakes.
Your way of labeling stuff sounds really very professional.
When I was doing this kind of stuff I’d hand print the labels out on graph paper, 2x sized. Then made a copy of it all using the copying machine at work that had a 50% reduction setting. Worked pretty well.
This is really cool! As far as I know, though, the MLB pin only exists on the WDC implementation of the 6502.
When I got my first S100 board (a Z80) it had a 4KB UVEPROM and that’s it. I got a Bill Godbout 8KB RAM board with 4 banks of 1024 x 1 bit SRAMs and used the CPU card’s monitor ROM to play. That was back in 1979 or so. They didn’t have 32KB ROMs or RAMs back then, and the PLAs weren’t as beefy as today’s FPGAs.
Is there an open source 6502 processor that could be done on a FPGA (if it was a big FPGA, you could probably get that whole setup on one).
Doesn’t even have to be a large FPGA these days. A MAX 10 10M25 or Spartan 6 XC6SLX25 have enough resources to cover all you need for a 6502 system. And yes, there’s the open source T65 core which gives you a 6502 off the shelf.
The MAX10 has its own internal flash, but the Spartan still needs an external flash chip to store the config, plus you’ll need at least one VRM chip for power, so you’ll not save much in components, plus you’ll need a much more complex circuit board. You can get away with smaller FPGAs, at the cost of using an external RAM chip.
A CPU and 4 chips?
Reminds me of the TimexSinclair-1000.
But kudos to the builder! Great work!
Use a 6510, then you get few GPIO’s for serial and stuff.
Add on an atmega328p hooked to that serial line and you’d have a usable computer..
https://hackaday.io/project/166821-bsw-100
This is literally the one hour practical lesson we had for 6502 and Z80 in the first year at college in the 1980s. I really don’t understand the challenge.
Perhaps getting serial output without any kind of GPIO? This is a hack I see for the first time. Sure, I’ve seen people debugging stuff by jumping to a specific code location or accessing a specific memory address, but using address lines to control serial output? Nice.
I wonder if this could be done with a GAL-based address decoder if one has spare two cells for an RS flip-flop. Or even use just an address line with carefully positioned series of instructions.
The first time you do it, it counts as a challenge. :-)
Everything was new to me once, and probably you too. I teach tangentially-related computer science classes to undergrads, and I try to remember that feeling.
For a minimal system you could even ditch the ram chip entirely, depending on what you’re running. It’s much more practical to do so on a z80 than the 6502, given the z80s large register set when you include the shadow registers, but would be possible none-the-less. Such as setting up fixed control flows in rom and setting the stack pointer to follow them, or avoiding subroutines entirely. Though 3 registers is quite limited on the 6502.
Hardware back in the 70’s and 80’s we’re under utilized. Coding for these systems will bring back true engineering principles. Adding a DOS BIOS with DOS using SD card and Ethernet stack is now possible for these legacy systems. Instead of multiple tasking on a single machine, clustering can be implemented.
My project didn’t run the 6502 as far as that one, but it only needed 3 chips, and the only reason it doesn’t need 2 chips is that the Propeller needs an EEPROM ;-)
(I’m not saying L-Star is better, just a little more “minimalist”)
https://hackaday.io/project/3620/instructions
As FAST as. Stupid autocorrect.