This week, Jonathan Bennett and Rob Campbell talk with Shimon Schocken about Nand2Tetris, the free course about building a computer from first principles. What was the inspiration for the course? Is there a sequel or prequel in the works? Watch to find out!
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If you’d rather read along, here’s the transcript for this week’s episode.
Theme music: “Newer Wave” Kevin MacLeod (incompetech.com)
Licensed under Creative Commons: By Attribution 4.0 License
There are two things I always recommend to people seeking to really understand how computers work: first, Ben Eater’s videos about building a working 8-bit microcomputer from TTL gates, and second, NAND to Tetris. Ben’s videos are great for demystifying computer hardware, and N2T was a huge help to me, similarly demystifying compilers.
I went through the full on-line NAND to Tetris (N2T) course back in 2019, I think it was (pre-covid, but not by much), and I too thought about building the machine in hardware. I found that it would fit in a Philips CPLD (which can be programmed like an EPROM, rather than needing a separate firmware chip), although I don’t remember which chip. It looked like this could be clocked at up to 50 MHz, which would put it in line with many commercial microcontrollers. BUT. That was around the point where I had the CPU design passing all tests, before going on to the software half of the course. Soon thereafter I found out how limited the CPU architecture really was.
Here are some of my observations as a student:
1) The course does have some gaps that are covered by a little hand-waving, with the first one being that in designing a hardware simulator, we got to the point of simulating static logic, but instead of getting everybody bogged down making clocked logic simulation work, the authors had us switch to their simulator as soon as flip-flops were introduced. Totally justifiable, but I felt that was a significant gap. And of course, as another enhancement, I COULD if I wanted, expand the simulator I wrote to handle clocking.
2) The assembler was an easy enough thing to design. But what became immediately clear was that the computer’s architecture was very inefficient, requiring a great number of instructions to actually DO anything.
3) The next gap was in simulating the complete computer, for use in doing the software tool development, if I remember this right, was that we no longer used the logic simulator at all, switching to a high-level simulator for a virtual machine that we had developed using our assembler. It was at this point that I kind of lost the connection between the software and the hardware. Which again is understandable, since any bugs in our virtual machines might let us generate code that would not run on the instrutors’ simulator.
If it were up to me, I would split this into two distinct courses, one for basic CPU design, and the second one for developing a software development chain – the assembler, virtual machine simulator, and compiler. I think that the software half of N2T suffered a little from the limitations of the hardware, requiring dozens of instructions to do something like pushing registers to a stack, and I don’t think it would break the whole chain of conceptualization to have a somewhat more capable CPU to work with. I mean, you could say, “we added the following registers and instructions to make the CPU more software-friendly,” and nobody who completed the hardware course would have asked, “but how did you do THAT?”
And I’ll go back to what I started with, lest I come across as overly critical: completing the N2T course was what got me over my fear of compilers, and I thank the authors for that.