JTAG Dongle Pushes Code To FPGA After Bootup

This gnarly beast has near-magical qualities. [Sprite_TM] patched it together as a dongle which attaches to a JTAG header (we’re fairly certain this is not a standard footprint for that interface though). He uses it to push code to an FPGA after that device boots. Why? Well, there’s several reason, but the most generic answer is that some boards will not boot unless there is a chain of trust that validates the code which will be running.

In this case, [Sprite_TM] is using a knock-off board he acquired from a Chinese supplier. It’s a hardware network terminal (thin client), and as you can see in the video after the break, it works just fine. But that’s pretty boring and he wanted to use it for his own purposes. When he plugs in the dongle and powers up the board the network terminal is nowhere to be found, replaced with the code to play Pac-Man as if were a full arcade cabinet.

The dongle is simply a female DIL header, an ATtiny85, and a flash memory chip. The AVR has a software UART that speaks XSVF, the protocol used to push data to the FPGA. The data to be written is stored in the memory chip, and with that header in place reprogramming the AVR is just a matter of connecting an ISP programmer. Brilliant!


12 thoughts on “JTAG Dongle Pushes Code To FPGA After Bootup

    1. Generally not, because the AVR is connected to the FPGA by the JTAG interface. This interface is not meant to communicate between devices in normal operation.

      But it would be possible, because inside the FPGA you can access the JTAG interface registers and implement additional JTAG registers and command statemachines as you need and like. It will be rather slow but when the AVR is fast enough for your application, still a possible way.

      Simpler for a new design use a Lattice MachXO2, it has a SPI interface for interfacing with Microcontrollers and to download new FPGA programming files. No special hacking needed, quite elegant IMO.

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