[Kenneth Wilke] is undertaking a noble quest – to build a homebrew microcomputer, based around the venerable 6502. As a prelude to this, he set out to interface the hallowed CPU to an FPGA, and shared the process involved.
[Kenneth] is using an Arty A7 FPGA development board which is a great fit for purpose, having plenty of I/O pins and being relatively easy to work with for the home tinkerer. This is an important consideration, as many industrial strength FPGAs require software licences to use which can easily stretch into the tens of thousands of dollars.
The 6502 is placed on a breadboard, and a nest of wires connects it to the PMOD interfaces of the Arty board. Then it’s a simple job of mapping out the pins on the FPGA and you’re good to go. Due to the 6502’s design it’s possible to step through instructions one at a time, and this is particularly useful on a basic homebrew build so [Kenneth] was sure to implement this functionality.
It’s all capped off with the FPGA sending the 6502 a starting address and a series of NOPs, to demonstrate the setup is capable of running the 6502 with instructions fed from the FPGA. It’s a project that shows the fundamentals of interfacing two technologies that are widely spread out in sophistication, and acts as a great base for further experimentation.
We can’t wait to see what [Kenneth] does next, as we’ve seen great things before.
“as many industrial strength FPGAs require software licences to use which can easily stretch into the tens of thousands of dollars.”
This is not my experiance from Actel/mictrosemi intel/altiera and xilinx. Sure they offer IP blocks you can buy, but you do not have to. You can roll your own or go to opencores or github.
Well this is a Xilinx board. There are higher end devices that require expensive licences, but those devices themselves tend to be in the price range you would not consider for blinking a led.
“Due to the 6502’s design it’s possible to step through instructions one at a time”
To be pedantic: the original NMOS 6502 couldn’t do this because the registers were dynamic. You can stop all CMOS variants by holding the clock high, and you can stop the Western Design Center WDC 65C02S in any clock state.
He’s not talking about stopping the clock, but about instruction stepping with the READY and SYNC pins.
“So for this project irqb, be, nmib, rdy and sob can all stay at 1 for now, as I won’t be using them.”
By the way, the Arty supports the virtual Propeller so it’s possible to emulate a Propeller that emulates a system like the Apple 1 to the 6502. (Yo dawg I heard you like emulation).
https://github.com/jacgoudsmit/p1v
https://hackaday.io/project/3620
The writeup here seemed to suggest that this was really old 6502 silicon and as such would’ve been from the 5V era. That had me worried as there appeared to be no level shifting or over voltage protection.
Reading a bit further, the WD65C02S (in use here) is rated at operation all the way down to 1.8V. That explains a lot and hopefully saves time for anyone else looking and suddenly getting worried about io pins breaking.
Agreed, the WD65C02S is good at 3V3, though not specified for operation beyond 8 MHz at 3V3 even though 14 MHz at 5V. When I did this, I just ran the 6502 at 3V3: https://github.com/neilstockbridge/6502-computer/tree/master/R2
The Arty series have an Arduino style interface, including a 5V rail, and no voltage protection. Anything you plug in could use that 5V line, send 5Vlogic to the Arty, and kill it.
The Arty series are relatively cheap but dead boards are still annoying.