Microcontrollers are a great way to learn about developing for embedded systems. However, once you outgrow their capabilities, FPGAs bring muscle that’s hard for even the fastest-clocked micros to match. If you’re doing anything with high-speed signals, loads of RAM, or something that requires lots of parallel calculation, you can’t go past FPGAs. Dev boards can be expensive, but there are alternatives. There’s a nifty project on Github trying to repurpose commodity hardware into a useful FPGA development platform.
Chubby75 is a project to reverse engineer the RV901T LED “Receiver Card”. This device is used to receive signals over Ethernet, and clock data out to large LED displays. This sort of work is highly processor intensive for microcontrollers, but a cinch for FPGAs to manage. The board packs a user-reprogrammable Spartan 6 FPGA, along with twin Gigabit Ethernet ports and 64MB of SDRAM. Thanks to the fact that its firmware is not locked down, it has the potential to be repurposed into all manner of other projects. The boards are available for under $30 USD, making them a prime target for thrifty hackers.
Thus far, the team have begun poring through the hardware documentation and are looking to develop a toolchain to allow the boards to be easily reprogrammed. With the right tools, these boards could be the next thing in cheap FPGAs, taking over when the Pano Logic thin clients become thin on the ground.
[Thanks to KAN for the tip!]
[Hyna] has spent seven years working with electron microscopes and five years with 3D printers. Now the goal is to combine expertise from both realms into a metal 3D printer based on electron-beam melting (EBM). The concept is something of an all-in-one device that combines traits of an electron beam welder, an FDM 3D printer, and an electron microscope. While under high vacuum, an electron beam will be used to fuse metal (either a wire or a powder) to build up objects layer by layer. That end goal is still in the future, but [Hyna] has made significant progress on the vacuum chamber and the high voltage system.
The device is built around a structure made of 80/20 extruded aluminum framing. The main platform showcases an electron gun, encased within a glass jar that is further encased within a metal mesh to prevent the glass from spreading too far in the event of an implosion.
Vacuum chamber enclosed in mesh (new gasket shown)
Mold for making silicone gasket
The design of the home-brewed high-voltage power supply involves an isolation transformer (designed to 60kV), using a half-bridge topology to prevent high leakage inductance. The transformer is connected to a buck converter for filament heating and a step up. The mains of the system are also connected to a voltage converter, which can be current-fed or voltage-fed to operate as either an electron beam welder or scanning electron microscope (SEM). During operation, the power supply connects to a 24V input and delivers the beam through a Wehnelt cylinder, an electrode opposite an anode that focuses and controls the electron beam. The entire system is currently being driven by an FPGA and STM32.
The vacuum enclosure itself is quite far along. [Hyna] milled a board with two outputs for a solid state relay (SSR) to a 230V pre-vacuum pump and a 230V pre-vacuum pump valve, two outputs for vent valves, and inputs from a Piranni gauge and a Cold Cathode Gauge, as well as a port for a TMP controller. After demoing the project at Maker Faire Prague, [Hyna] went back and milled a mold for a silicone gasket, a better vacuum seal for the electron beam.
While we’ve heard a lot about different metal 3D printing methods, this is the first time we’ve seen an EBM project outside of industry. And this may be the first to attempt to combine three separate uses for an HV electron beam into the same build.
There’s something about Frequency Modulation (FM) synthesizer chips that appeals to a large audience. That’s one of the reasons behind [René Ceballos]’s XFM project, aiming to duplicate on an FPGA the sound of pure-FM synthesizer chips of the past such as the Yamaha DX series, OPL chip series and TX81Z/802/816. The result is a polyphonic, 32-voice, 6-operator FM synthesizer stereo module.
The project page goes into a lot of detail about the design choices which ultimately led to XFM being implemented on an FPGA, instead of using a dedicated DSP or MCU. Coming from the world of virtual synthesizers running on PCs, [René ]’s first impulse was to implement something on a Raspberry Pi or equivalent. Unfortunately these boards require a lot of power (ruling out battery-powered operation) and can hardly be called real-time, which led [René ] to abandon this attempt.
The design choice against the use of an MCU is simple: though capable of real-time processing, they lack the necessary power to make them a good choice for audio-processing. Working through the calculations to determine what kind of processing power would be needed, it was found that around 650 MIPS would be needed, a figure which most MCUs struggle to achieve a fraction of.
As one of the further requirements for XFM was that it should be as cheap as possible, this ruled out as too expensive the DSP chips which do have the power and hardware features needed. The component chosen was a Xilinx Spartan 6 FPGA, which though somewhat infamous and shunned in FPGA circles turns out to be a very economical option for this project.
Continue reading “XFM: A 32-Voice Polyphonic FM Synthesizer On An FPGA”
The Field Programmable Gate Array (FPGA) is one of the most exciting tools in the modern hacker’s arsenal. If you can master the FPGA, you can create hardware devices that not only morph and change based on your current needs, but can power through repetitive tasks at phenomenal rates. The only problem is, working with FPGAs can be a bit intimidating for newbies. One could argue that the technology is waiting on its “Arduino” moment; the introduction of a cheap development board coupled with easy to use software that brings FPGA hacking into the mainstream.
If everything goes according to plan, the wait might soon be over. [Ryan Jacobs] believes his project WebFPGA is the easiest and fastest way to get your hands dirty with this incredible technology. Outwardly the hardware could pass for an Arduino Nano clone, with a bunch of GPIO pins and a couple of LEDs on a small breadboard-friendly PCB. Certainly a no-frills presentation. It’s the software side is where things get interesting: all you need to develop for this FPGA is a modern web browser.
Currently Chrome, Opera, and Edge are supported, even if they’re running on relatively low-end computers. [Ryan] says this makes it much easier and cheaper to roll out FPGA classes in schools, as students can do everything with their existing Chromebooks. As the video after the break shows, you can even get away with using a sufficiently powerful smartphone to do some FPGA hacking on the go.
So what’s the trick? Essentially the heavy-lifting is done remotely: all of the synthesis is performed in their cloud backend, with the final bitstream delivered to the user for installation through WebUSB. If you’re more comfortable on the command line, [Ryan] says they’re currently working on tools which will allow you to perform all the necessary interactions with their cloud service without the browser.
The more critical Hackaday reader will likely be concerned about lock-in. What happens if you buy one of these development boards without a license for the service, or worse, what happens if WebFPGA goes belly-up down the road? To that end, [Ryan] makes it clear that their hardware is completely compatible with existing offline FPGA development tools such as the open source IceStorm.
We’ve seen considerable interest in low-cost FPGA development platforms, with readers perhaps recalling the excitement surrounding the fire sale of the Pano Logic thin clients. Despite efforts to make developing for these systems even easier, it’s hard to imagine the bar getting much lower than what WebFPGA is shooting for. Their Kickstarter campaign is close to crossing the finish line, and we’re very interested to see where the product goes from here.
Continue reading “Bringing FPGA Development To The Masses”
When the only tool you have is a hammer, all problems look like nails. And if your goal is to emulate the behavior of an FPGA but your only tools are FPGAs, then your nail-and-hammer issue starts getting a little bit interesting. That’s at least what a group of students at Cornell recently found when learning about the Xilinx FPGA used by a researcher in the 1990s by programming its functionality into another FPGA.
Using outdated hardware to recreate a technical paper from decades ago might be possible, but an easier solution was simply to emulate the Xilinx in a more modern FPGA, the Cyclone V FPGA from Terasic. This allows much easier manipulation of I/O as well as reducing the hassle required to reprogram the device. Once all of that was set up, it was much simpler to perform the desired task originally set up in that 90s paper: using evolutionary algorithms to discriminate between different inputs.
While we will leave the investigation into the algorithms and the I/O used in this project as an academic exercise for the reader, this does serve as a good reminder that we don’t always have to have the exact hardware on hand to get the job done. Old computers can be duplicated on less expensive, more modern equipment, and of course video games from days of yore are a snap to play on other hardware now too.
Thanks to [Bruce Land] for the tip!
We will admit it: mostly when we see a homebrew CPU design on an FPGA, it is a simple design that wouldn’t raise any eyebrows in the 1970s or 1980s. Not so with [Henry Wong’s] design, though. His x86-like design does superscalar out-of-order execution, just like big commercial modern CPUs. Of course [Henry] designs CPU architectures for Intel, so that’s not surprising. You can see a very detailed talk on the design in the video, below. You can also read the entire thesis project.
[Henry] starts out with a description of FPGAs and soft processors. He also covers the use of multiple instruction issue to increase the virtual clock rate of a CPU. In other words, if a 100 MHz CPU can do one instruction at a time, it won’t be any faster — in theory — than a 50 MHz CPU that can do two instructions at once. Of course, trying to do two at once has some overhead, so that won’t be completely true.
Continue reading “FPGA Soft CPU Is Superscalar”
Sometimes, rather than going the commercialistic route, it can be nice to make a gift for that personal touch. [Mahesh Venkitachalam] had been down this very road before, often stumbling over that common hurdle of getting in too deep and missing the deadline of the occasion entirely. Not eager to repeat the mistake, help was enlisted early, and the iCE bling earrings were born.
The earrings were a gift for [Mahesh]’s wife, and were made in collaboration with friends who helped out with the design. The earrings use a Lattice iCE40UP5k FPGA to control an 8×8 grid of SMD LEDs. This is all achieved without the use of shift registers, with the LEDs all being driven directly from GPIO pins. This led to several challenges, such as routing all the connections and delivering enough current to the LEDs. The final PCB is a 4-layer design, which made it much easier to get all the lines routed effectively. A buffer is used to avoid damaging the FPGA by running too many LEDs at once.
It’s a tidy build, which makes smart choices about component placement and PCB design to produce an attractive end result. LEDs naturally lend themselves to jewelry applications, and we’ve seen some great designs over the years. Video after the break.
Continue reading “A Stylish Pair Of FPGA Earrings”