New Part Day: Espressif ESP32-S3

Since Espressif Systems arrived in our collective consciousness they have expanded their range from the ESP8266 to the ESP32, and going beyond the original WROOM and WROVER modules to a range of further ESP32 products. There’s a single-core variant and one that packs a RISC-V core in place of the Tensilica one, and now they’ve revealed their latest product. The ESP32-S3 takes the ESP to a new level, packing as it does more I/O, onboard USB, and an updated version of the two Tensilica cores alongside Bluetooth version 5. It’s still an ESP32, but one that’s more useful, and it’s worth a closer look because we expect it to figure in quite a few projects.

Espressif's block diagram for the chip.
Espressif’s block diagram for the chip.

Sadly the data sheet does not seem to have been released, but we do have some tidbits to consider. Espressif are anxious to tell us about its “AIOT” capabilities thanks to the vector instructions in the EXTensa LX7 cores (PDF) that were not present in the previous model’s LX6. They claim that this will speed up software neural networks; this does have an air of marketing about it but we’ll withhold judgement until we see it in use. The new core certainly will offer a performance improvement across the board though, which should be of interest to all ESP32 developers. Meanwhile the ultra-low-power core that existing ESP32 developers will be familiar with remains.

Then there is that USB support, which appears in the feature block diagram but has little information elsewhere. It’s listed as USB OTG which raises the possibility of the ESP32 being the host, but what it should also bring is the ability to emulate other USB devices. We’ve seen badges mount as WebUSB devices using STM32 clones as peripherals for an ESP32, but in future these tricks should be possible on the Espressif chip itself.

Probably the most anticipated piece of the new device’s specification comes in the addition of 10 new I/O lines. This has historically been a weakness of the ESP line, that it’s an easy chip with which to run out of available pins. These extra lines will make it more competitive with for example the STM32 series of microcontrollers that have larger package options, and will also mean that designs can have more in the way of peripherals without the use of port expanders.

In summary then, the latest member of the ESP32 family delivers a significant and useful update, and brings some of the features first seen in the single core version to the more powerful line of chips. Sadly it doesn’t have the hoped-for on-chip RAM boost, but it brings enough in the way of new capabilities to be of interest. At the moment it doesn’t look like the ESP32-S3 is available to order, but we hope to have engineering samples soon and should be bringing you a hands-on report in due course.

51 thoughts on “New Part Day: Espressif ESP32-S3

  1. Thanks for the tip.
    These IOT modules are being used more and more like generic microcontrollers, and Expressif have already realized that, which in turn makes me wonder: Will we witness a embedded processor “war” in the next years – Teensilica x ARM – similar to the z80 x 6502 that we have experienced in the past?

    1. I don’t see Tensilica ever gaining such prominence as to warrant a “war” of sorts. Espressif is the only manufacturer I am personally aware who uses that stuff, while everyone else uses ARM or RISC-V now and, if there is going to be any sort of a “war”, it’ll be between those two.

  2. The Tensilica toolchain is rubbish. Developing anything against it is a real PITA, even for hobby projects. It’d be interesting to have a cheap wifi-enabled module that has an ARM Cortex core in it (or a RISC-V, though I wonder what is the state of affairs in the toolchain arena).

    Call me back when it happens.

    1. I am not a fan of the Tensilica cores, but toolchain is just GCC with some Makefiles/CMakefiles and Menuconfig around, and that is just perfect, at least for me.

      I hate those toolchains with a lot of automagic, easy to setup for simple stuff, but that tie you to a specific IDE.

  3. It would be good if only they made idf lubrary working properly.
    What’s the sense of the new hardware,when limited lubrary can’t allow you do what you want.
    Comparing it to stm32 is a MISTAKE.

  4. The ESP32-S2 supports USB OTG and WiFi TOF. The part has been available for a year, but there’s STILL no support for either of the two features that make it interesting. Supposedly v4.2 is going to support those two features, but without that support, this part isn’t particularly useful.

    1. You mean it has host support too, in theory, not just device? I’ve got an esp32s2 device from adafruit that uses the usb port (with tinyusb) in both a uf2 bootloader and in circuit python, and it seems to work well. Haven’t tried anything lower level yet but I have a spare module sitting here for that purpose at some point. USB host would be interesting but I’m not sure how I’d use it. That said, I’m partial to ps2 input devices anyway.

      1. I’m using the S2 as a usb mass storage device bringing the IDF spi flash libs into the Arduino environment so I can combine with Adafruits SDfat for spi flash library and tinyUSB. I didn’t expect it to work but it does and it’s as smooth as a cashmere codpiece.

    2. That’s interesting, I’m wondering how hard it would be to run a network stack over USB like you can do between a desktop and android. … then implement a framebuffer over the top so it’s got video output to something like VNC… yah, I have weird thoughts about what to do with things.

  5. that was ‘fast’ reporting by HaD – that was all out at the end of last year via press release (with no extra details since), obviously some has read the press release and done the above article..

    It appears to be just a esp32 (plain) replacement with the updated cores and a few more pins. So I imagine the esp32 (plain) will now disappear once current stock is exhausted..

    The main things are it doesn’t have 5Ghz wifi, and they don’t seem to have fixed their memory architecture ie ignore how much ‘ram’ they say you can use – most of it can only be used for file system not instructions/data, and it’s all done with block management.. Reminds of programming the first dos machines ie programming in 64k blocks..

    1. We have no intention of deprecating the ESP32, our longevity guarantee (https://www.espressif.com/en/products/longevity-commitment) says you will still be able to buy it until at least 2028. Also, the 64K blocks is more an architecture thing than something you will notice in software: to software, the memory is just going to be one big pool of RAM. (Although if you need some advanced features like memory protection, the 64K blocks do play a role – not in the way they limit you but in the way that configuration needs to be done with it in mind.)

  6. No mention on the RF module just hanging on there? If the S3 can do more than OOK, then I will be a happy hobbiest. The IR module is ok, but I really want to do some FSK work.

  7. I hope there will be new Espressif chips with Ethernet RMII. The rich protocol catalog in ESP-IDF in combination with a low cost chip makes it a great choice for Ethernet projects for me.

      1. Glad to hear. Eth is integral to my ESP32 product, but I’m completely out of I/O (RMII is using 9 pins!) I’m hoping they put the EMAC in the new ESP32-SWhatever chip too!

        The other option is to use the SPI bus and a SPI-Ethernet chip with built-in MAC and PHY like ENC28J60 (10Mb), ENC624J600, DM9051, KSZ8851 (100Mb). Some of these chip are already supported in ESP-IDF (although I haven’t tried yet).

    1. Agree.

      The poor ADC has put my project to a halt. Readings of the ADC does not start from 0V. It has a horrible dead-band.
      I hope it will be fixed or external I2C ADC is required.

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