It seems every day there’s a new microcontroller announcement for which the manufacturer is keen to secure your eyeballs. Today it’s the turn of Espressif, whose new part is the ESP32-P4, which despite being another confusingly named ESP32, is a high-performance addition to their RISC-V line-up.
On board are dual-core 400 MHz and a single-core low power 40 MHz RISC-V processors, and an impressive array of hardware peripherals including display and camera interfaces and a hardware JPEG codec alongside the ones you’d expect from an ESP32 part. It’s got a whopping 768 KB of on-chip SRAM as well as 8 K of very fast cache RAM for intensive operations.
So after the blurb, what’s in it for us? It’s inevitable that the RISC-V parts will over time displace the Tensilica parts over time, so we’ll be seeing more on this processor in upcoming Hackaday projects. We expect in particular for this one to be seized upon by badge developers, who are intent on pushing extra functionality out of their parts.So we look forward to seeing the inevitable modules with this chip on board, and putting them through their paces.
Thanks [Renze] for the tip.
>H.264 encoding support
>
Looks like a license trap, will see the implications and what this might do to the price. Anyone who knows their stuff regarding this potential issue?
I can’t say for sure but I think the price of H.264 encoding IP has decreased since AV-1 is on it’s way to destroy it.
Thanks Gravis that is good to know! Platforms like Steam still ship their binary encrypted, so that the encoder is only decrypted when the user wants to encode h.264 for i.e. a game stream. I hope paying this terrible license kraken a single cent can be avoided in the same way. If that means registering an SoC / MCU to unlock the encoder. I will gladly have that function locked and not feed the beast.
Sadly according to BBC, AV1 is just as good as HEVS (h.264), but not a license bomb like VVC (h.266):
https://www.bbc.co.uk/rd/blog/2019-05-av1-codec-streaming-processing-hevc-vvc
We will see how the finalized codecs perform, but I hope AV1 to win just because it is true FLOSS.
*Sadly according to BBC, AV1 is just as good as HEVC (h.265), but not a license bomb like VVC (h.266)*
Sorry I made typos, fatfingering it on a virtual phone keyboard :c
Is “licence trap” the reason that the ESP32-P4 is lacking an USB interface?
It’s not? It has an USB-OTG 2.0 high-speed interface in the block diagram.
And from https://www.espressif.com/en/news/ESP32-P4 block diagramI learnt that there is also an USB 1.1 FS Serial / JTAG
“RISC-V parts will over time displace the Tensilica parts over time”
You getting overtime for extra over time?
The gig economy.
Dual core; race condition.
B^)
Clearly you have never dealt with more than one core. Your PC has more than one core. Do you see a race condition there ?
Race co dotio s generally come from parallel prcoessing, or multi threaded or multi-application solutions (e.g. client-server for example). Many bugs come from this, also on desktops, so the answer to your question mark is a firm yes!
Clearly you have never dealt with processing interdependent workloads on more than one core. If you don’t get race conditions there, you either have very consciously mitigated them, are using OS mechanisms that take care of it (and maybe are unaware of it), or have gotten very, very lucky.
But it’s not as if you can’t get race conditions on a single-core processor, unless all you ever do for I/O is poll rather than use interrupts.
If you don’t know how to use a gun, don’t use it. Race conditions are as old as multitasking, e.g. they are not multi-core specific.
Nobody is forced to use both Cores…If one doesn’t have the technical knowhow.
Very easy to use both cores
“It is powered by a dual-core RISC-V CPU with an AI instructions extension…” But will Espressif tell us what the instruction set is?
only with the signature of the nda.
IMO these are useless w/o broad clang/gcc support. You get a vendor library that can do two and a half things, mostly demos.
It is not a bad part w/o the AI stuff.
The esp32c3 RISC-V gcc toolchain for me has been lovingly uneventful so far
Likely yes. As a reference, the ESP32-S3 AI instructions are documented in the first 296 pages of the TRM (https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf). I imagine we’ll treat the P4 the same way (iirc the AI instructions are quite similar)
Too bad it does not have any wireless trx onboard.
Plenty of wireless modules around one can use for wireless connectivity if needed, this is complex and power hungry enough already. It is obviously not targeting Wifi/Bluetooth interface market, more like smart cameras, displays, etc.
I am more wondering about price and what packages is it going to be available in.
Much prefer it without wireless. Can add that stuff if required. Low power is more important. I wonder how much amperage the low power core uses?
With the wireless engine similar to that of STM32WL it would have been an absolute killer micro.
Low power is only important to those who need it. Many others care about speed.
Speed is only important to those who need it. Many others care about low power.
What we need is a chip that has a single low power core but with an option to use an onboard high power multi-core when required.
It doesn’t? Isn’t that the whole point of an ESP32?
They’ve got to leave something for the P5.
Funny enough, their press release suggests ganging it up with an ESP8266. :)
Well, if you want wireless they just released the first ESP32-C6 development boards. The ESP32-C6 combines 2.4 GHz Wi-Fi (802.11 b/g/n/ax), Bluetooth 5 (LE), and a IEEE 802.15.4 radio for ZigBee and Thread. Expanding to a more powerful processor without any wireless really just shows that they are branching out. Probably a good move to make ESP32/RISC processors more diverse to make them compete with way more proprietary CPU architectures.
Since this device doesn’t have any wireless hardware, it looks like it’s meant to complement the older devices, not replace them.
There has been a dead zone, or at least a desert, at this performance level. Companies like Samsung had great success with chips like the S3C2440 which is a 400MHz ARM and is in loads of low end O’Scopes and routers, etc. They ran mostly Linux or WinCE. The ARM with Linux crowd has moved steadily to faster/newer/more cores. Meanwhile the simpler embedded stuff has mostly gone 32 or 64 bits with STM32F104 being 160MHz and others including Espressif making parts at 300+.
400MHz with dual core. Hmmm. You can certainly slip into most of the embedded jobs that were done with the long discontinued phone chips. A lot of them had camera inputs and display outputs. The drones will be getting smarter.
I see they exceeded the Gates Limit by 128K. Fascinating Captain.
look interesting till I saw they had dropped the wifi and bluetooth..
And I laughed when they said ‘ Espressif’s mature IoT Development Framework (ESP-IDF),’ – as esp-idf is the biggest drawback of their whole ecosystem..
+1 to that the IDF is a PITA. ‘Have to do things our way or the high way’.
Probably because you both are use to Arduino, and not the real world of programming micros. IDF is very simple to use.
ESP-IDF is amazing, your comment not so much.
You’re not really required to use ESP-IDF. You can develop for the chip in the old school Makefile way as well, its not much different from a simple microcontroller…
I Find IDF to be one of the better designed vendor provided HAL and middleware solutions.
I totally disagree. I been engineering for 30 years and it’s the best free embedded framework I’ve ever seen
Well, ESP Rainmaker is always an option, especially for IoT. ESP-IDF isn’t the only option when using Esspressif as they parternered with AWS for rainmaker and it looks pretty promising. With that said I haven’t looked that deep into it but having a dedicated phone app platform, free evaluation’s and their own voice assistant while also working with Alexa and Google Assistant and an MQTT cloud platform isn’t a bad place to start if one was looking to get into the IoT business.
Totally agree. ESP-IDF is useless if you require things like consistent interrupt latency. You know, just things you typically need when doing low level embedded project. It is however great for blinking an led or flipping a relay, the typical IOT junk.
I’m doing consistent interrupt latency with (their) FreeRTOS in esp-idf. There’s nothing forcing you to follow their examples with posting things in ISR to tasks for processing, only a fool would do that for high frequency interrupts. You can process in an ISR like you want and since they have plenty of RAM, you’ve one of most performant µc here.
What I really want to see is the datasheet… These days new MCUs come with a crapload of off-the-shelf-IP-core peripherals some of which are worse than useless and some of which are hackable to such a degree that they can be made to do stuff nobody expected (like the I2S port on the original ESP32 or the programmable DMA controllers on the PIC32MZ family).
So, while these announcements are interesting it a vague and distant way, the point where I get excited is when there’s a register reference and an eval/breakout board I can buy to put it through its paces.
And the eval board is under $30.
B^)
https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf
Interesting to see h264 hw encoder in there. Do you guys think it will be able to do 1080p@30 ? Trying to do a wildlife trail camera. Was looking at the pi zero 2 but power consumption and boot time are problematic.. With the “standby” core, i believe this could solve both problems.
Will the ADC channels still be rubbish? That memory management system got anything resembling a MMU?
First version of H.264 patent expires in 2023
It’s a shame they are using a h.264 encoder. Why not VP9 (AV1 is a bit too recent and computationally expensive to be added at this point).
Any user of this encoder is almost certainly doomed to licensing headaches
They may be thinking more of business customers such as those doing CCTV cameras, so you need a codec that’s going to be accepted by the current market. Existing ONVIF NVRs will expect h.264 (or h.265 at a stretch).
I’d like to know if EspressIf will embrace PIO? It’s one of the main strengths of the Pi2040 and can substantially offload GPIO or moving data.
By now, one might use ULP coprocessor to offload some I/O operations. Well, most likely not as powerfully and comfortably as Pi might do..
^^ this, though I wonder if RISC ULP programming in C might be easier to do than PIO
So this will come in LGA1155 judging by the test matching test pads? :)
Espressif ought to look at getting better at ADC engineering.
No wireless, but there is ethernet. So I’m now curious about building a small RISC-V Linux cluster with a few modules.
Any ideas on unit price and timelines?
Still not available.
Nope. Unfortunately, there’s a fair amount of time needed to tape out chips, and we (Espressif) have the tendency to announce fun stuff quite early on, so they generally aren’t available for a fair amount of time after the announcement. I think the current schedule is to have engineering samples available in aug/sept and mass production going near the end of the year, but don’t hold me to that please (as issues we find in the silicon or other unforeseen things may delay stuff)