Xilinx recently announced the Virtex UltraScale+ VU19P FPGA. Of course, FPGA companies announce new chips every day. The reason this one caught our attention is the size of it: nearly 9 million logic cells and 35 billion transistors on a chip! If that’s not enough there is also over 2,000 user I/Os including transceivers that can move around 4.5 Tb/s back and forth.
To put things in perspective, the previous record holder — the Virtex Ultrascale 440 — has 5.5 million logic cells and an old-fashioned Spartan 3 topped out at about 50,000 cells — the new chip has about 180 times that capacity. For the record, I’ve built entire 32-bit CPUs on smaller Spartans.
That led us to wonder? Who’s buying these things? When I first heard about it I guessed that the price would be astronomical, partly due to expense but also partly because the market for these has to be pretty small. The previous biggest Xilinx part is listed on DigKey who pegs the Ultrascale 440 (an XCVU440-2FLGA2892E) at a cost of $55,000 as a non-stocked item. Remember, that chip has just over half the logic cells of the VU19P.
Beyond Silicon Verification
The press release mentions companies like ARM using these devices to test new chip designs before tape out. That makes sense, but there aren’t many companies that need chips this big for that purpose. Massive parallel processing might make sense, too. However, I suspect there might be a third class of customer.
In computer security, there’s a term: script kiddie. These are people who use software written by someone else to hack into computers because they lack the ability to write it themselves. I think these new super-sized FPGAs might be catering to the FPGA kiddies — people who mostly use FPGAs to compose custom ICs from existing intellectual property (IP) that they buy or acquire from the vendor. Pulling in multiple different FPGA IP uses up logic cells fast. If you don’t want to spend the time writing your own modules, you’re likely to opt for spending more on larger hardware instead of rewriting the code to occupy fewer resources.
Not that there’s anything wrong with that, the process of writing and testing these blocks of logic is a long and expensive one. Among many advantages of FPGAs is the ability to leap forward on the shoulders of tried and tested IP. The analog is using ICs to build circuits versus using discrete components for everything. Maybe the field has grown to the point that vendors should divide up the way they classify these parts. An FPGA is for traditional logic and a FRIC (Field Reconfigurable Integrated Circuit) is more a palette for IP. Then again, the parts are the same either way, I suppose.
Blame Your Tools
The tools, though, ought to be very different. The push with modern tools is to make logic synthesis, IP composition, and firmware development for processors all in one place. I’m not sure that makes as much sense as it seems on first blush. After all, if I’m building a DSP processing chain, I might not care about coding firmware for some embedded processor I’m not using. Conversely, if I’m programming some ARM core, it might not matter to me to be able to create a lot of logic. Sure, some people will blend all of these things together, but I’d bet that’s the exception and not the rule.
If that’s true, perhaps we really do need different tools for each type of FPGA user. I agree, of course, that it doesn’t have to be an either/or proposition. You might use an ARM processor along with some custom Verilog and a few pieces of IP.
Still, what would you use a 9 million cell FPGA for? If not parallel processing or extreme IP composition, how would you manage the complexity of something so large? Granted, with this price tag I think it’ll be a long time before we see any projects for it on our tip line. If you do happen to have access to one of these, please do something at least a little bit ridiculous with it and send us a link!
You may not be able to configure 9 million gates, but you can learn about FPGAs in our bootcamp. Only one part of the series is specific to the Lattice Icestick — the $5 chip on that board has around 1,200 lookup tables and you can bet they are probably less capable per cell than the Virtex part. If you want to try putting an ARM CPU on a more reasonably priced part, there’s always this.