AVR Configurable Custom Logic As A Frequency Divider At 4x Chip’s Clock Speed

What a time to be alive when you can find inexpensive microcontrollers that come with programmable(ish) logic that can operate independently of the system clock. [David Johnson-Davies] recently built a proof of concept using the Configurable Custom Logic (CCL) that is available in some of the newer AVR microcontroller designs. It’s a simple implementation, a set of frequency dividers that blink three LEDs with up to a 90 MHz input signal. But the simplicity is the reason to love his write-up — you can wrap your head around it right away.

There are four lookup table (LUTs) used to form the frequency divider. Think of these like a NAND or XOR gate, but you get to decide how the output truth tables will perform. The output is fed into a sequencer which can be configured as a D/JK flip-flop or a D/RS latch, plus you can specify the signal edge, and of course define the clock source. An interesting trick here is to hold the G input of both D flip-flops high by feeding them LUTs set to all ones. Note that the output of the first divider (PA3) is feeding the external input (PD2) of the second divider.

While the CCL is configured using the C code you flash to the microcontroller, it’s a hardware peripheral capable of operating independent of the chip’s system clock. The AVR128DA28 that’s used here tops out at 24 MHz (double that if you use the PLL) but [David] got reliable results from his clock divider feeding a signal as high as 90 MHz to the input pin. Of course you have the option of feeding internal clock signals to the CCL, but that wouldn’t seem nearly as interesting here. For the demo, [David] is actually toggling an IO pin which is connected to PA2 as the external input for the logic. Make sure you click through to his write-up linked above as he does an excellent job of walking through the sample code (just a couple-dozen lines to set this all up). Here’s the datasheet for this chip (PDF, page 447 for pertinent registers) and for a deeper dive the appnote on CCL (PDF).

So what is this all good for? We already saw an answer to that question back in January when [SM6VFZ] used the CCL peripheral to build a software-defined switch-mode converter. How awesome is that?

13 thoughts on “AVR Configurable Custom Logic As A Frequency Divider At 4x Chip’s Clock Speed

  1. I’ve never utilised this and it always seemed easier to achieve the task in software but between this and switch mode power supplies this is pretty handy.

    I’ve skipped this section in the datasheet for ages (for PIC). Again it seems AVR is trumping PIC at its own game… (Not that Microchip cares which arm wins so long as it’s not THAT ARM)… I mean by getting my interest in a feature despite having had access for ages.

    1. The fact that it’s not ARM, so it’s a hundred times simpler to program? E.g. no four different ways to access pin IO with different timing and synchronization methods.

  2. One of the nice things about the PIC16F84 (Which was one of the first FLASH based controllers some 20 years ago) was that when an external clock was used for the timer, the timer ran outside of the main clock domain and this detail made it possible to build a frequency meter with it which could measure frequencies much higher then it’s clock frequency.

    1. I think just about all PICs have one or more timers which operate in “counter mode”. Even the 12F508 and 10F200. Both do have some limitations on the clock for synchronization purposes not that’s ever bothered me…

      Do you mean 16x84s were the first to do so?

      1. Not the OP but I clearly remember many frequency meters built around PIC uCs in the late 90s to early 2Ks that could count above 50MHz without the need for any prescaler, while every AVR based ones from the same era wouldn’t go much higher than 1-5 MHz without an esternal divider.

  3. I’ve sometimes used a PIC for nothing more than its Configurable Logic Circuits. I’d love it if Microchip would make a microcontroller with just a ton of CLCs – something like CPLDs, but programmable with the same ICSP I use for PICs.

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