A NOR Gate For An ALU?

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If you know anything about he design of a CPU, you’ll probably be able to identify that a critical component of all CPUs is the Arithmetic Logic Unit, or ALU. This is a collection of gates that can do a selection of binary operations, and which depending on the capabilities of the computer, can be a complex component. It’s a surprise then to find that a working CPU can be made with just a single NOR gate — which is what is at the heart of [Dennis Kuschel]’s My4th single board discrete logic computer. It’s the latest in a series of machines from him using the NOR ALU technique, and it replaces hardware complexity with extra software to perform complex operations.

Aside from a refreshingly simple and understandable circuit, it has 32k of RAM and a 32k EPROM, of which about 9k is microcode and the rest program. It’s called My4th because it has a Forth interpreter on board, and it has I2C and digital I/O as well as a serial port for its console.

This will never be a fast computer, but the fact that it computes at all is ts charm. In 2023 there are very few machines about that can be understood in their entirety, so this one is rather special even if it’s not the first 1-bit ALU we’ve seen.

Thanks [Ken Boak] for the tip.

18 thoughts on “A NOR Gate For An ALU?”

      1. http://mynor.org/my4th

        In the HOW DOES IT WORK, there is a link “The MyNOR ADD instruction” to explain how the ADD works.
        Well, as we can see hardware has been replaced by software.
        Interesting to see how it actually works.
        But to understand 9k of microcode will be quite a task.
        Great work though.

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  4. One bit processors can actually be useful.

    Many, many years ago I worked for Martin Marietta on an infrared video project that used a chipset they were developing called the grid array parallel processor – GAPP.

    It consisted of an array of small 1-bit processors, and the idea was that you could load a block of pixels and work on all of them in parallel.

    This being the 90’s and chip technology being what it was, 1 bit machines were all we could build.

    Still, there were a *lot* of them, so once you got the data on the grid, the actual processing was really fast.

    Unfortunately, the overhead of breaking the pixel data into 1 bit streams to load up the array, and then unloading the array back out to get normal video again was just unmanageable.

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    1. That is extremely similar to how the Connection Machine CM2 worked – it had 16,384 one-bit processors. From an information theoretic standpoint, the fewer bits wide your machine is the more efficiently it uses power and space – smaller width ALUs increase the odds of a bit changing state on the next instruction and hence conveying more information. Thinking Machines’ compilers did the work to hide the 1-bit nature of the machine and made it look like a “more” conventional machine. More like a conventional machine with a very, very wide vector unit anyway.

      I wonder how often these days the top 32 bits of a 64-bit operand is 0x00000000 or 0xFFFFFFFF? I bet a few folks at AMD and Intel could answer that off the top of their heads. :-)

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      1. So often we made the default data width for x86-64 instructions 32-bits, and made acting on the lower 32-bits of a register automatically zero the upper 32-bits. We also encouraged C compiler vendors to keep the ‘int’ data type as 32-bits when targeting our 64-bit instruction set.

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