Fail of the Week: Marginally Documented Pad Shorts to Maskless PCB

[Erich Styger] was bit by a nasty gotcha when soldering a QFN surface mount chip. The problem rears its ugly head when combining a chip possessing a padless conductor and a PCB without a solder mask. As you can see in the image above, there is a conductor exiting the side of the plastic QFN, but there is no pad associated with it. For this reason, you won’t see the conductor documented in the datasheet as a pin. It is documented in the mechanical drawing of the package, without any explicit reference to its existence. This is the Jason Bourne of package quirks.

The PCB layout just happens to have a trace exiting right under this conductor. The two aren’t touching, but without solder mask, a bit of melted metal was able to mind the gap and connect the two conductors. [Eric] notes that although the non-pad isn’t documented, it’s easy to prove that it is connected to ground and was effectively pulling down the signal on that trace.

In a recent article on Hackaday I talked about “dangling pointers” and the challenge when interrupts expose the bug. [Erich’s] covered a ton of posts about embedded software. I was doing some poking around and was delighted to find that he covered the same concept and a solution for it using a program called cppcheck.

34 thoughts on “Fail of the Week: Marginally Documented Pad Shorts to Maskless PCB

  1. I was bit by this bug too when I was making an Arduboy business card, the capacitive touch sensor was a QFN and my drag soldering created the short.

    What saved me though is before I apply power, I always like to look at each of my joints under the microscope and noticed the oddly shaped joint in the corner.

    1. Actually the pads are supposed to be extended beyond the package to form a fillet. You would also try to round off the other end under the package. So it would seem OP hasn’t read any of the app notes on the subject.

      https://www.freescale.com/files/analog/doc/app_note/AN1902.pdf
      >fillet is expected to form and should be visible on the PCB after the solder reflow
      Also see the SEM picture of solder joint and cross section on page 7.

      1. THAT is what I call a explenatory comment. very good! Indeed, the pad on the corner going at a right angle instead of extending in line can only lead to the problem above. I even make my pads as long outside the package as they are underneath to let the surplus of tin go as I have to do the soldering by hand.

  2. These pads are always connected to ground. The central ground pad is connected to the plastic package shell with these attachment points. A QFN without central pad won’t have these extra pins.

      1. That’s interesting. As the datasheet says, the central pad is bonded to the die substrate, which is usually at the most negative supply voltage used. Due to the way integrated circuits are manufactured there’s a whole bunch of diodes between the substrate and other parts of the circuit that need to be kept safely reverse-biased. Wonder what they’re doing to cause it to be at VCC instead.

      2. re: gnd vs vcc substrate.
        from wiki/CMOS
        >The N device is manufactured on a P-type substrate while the P device is manufactured in an N-type well (n-well). A P-type substrate “tap” is connected to VSS and an N-type n-well tap is connected to VDD to prevent latchup.

  3. Those are part of the lead frame. They are to anchor the center tab to the package. They do serve a purpose. They are also documented as OP has found out.

    They would not have made contact if the pads were reflowed with the right amount of solder paste instead of being soldered by hand on a board without soldermask.

    1. this.

      I know Hackaday is all about homebrew and creative ways to do things that other people say are impossible, but a QFN that big with that big a thermal pad should ONLY be soldered using reflow and paste. If someone wants to *attempt* to hand solder, more power to them, but they really shouldn’t complain about the IC maker if they’re intentionally not doing it the right way…

      Also, as pointed out in another comment, traces exiting from the pads at right angles is a no-no. Go straight out from the body and then make the turn.

          1. thermal pad is easy, put a big blob of solder on the pcb pad, soak everyting in flux, heat it up with hotair, then put chip on top of this shitsandwitch and heat until it drops into place, push with tweezers to dislodge excess solder from under – it will create solder spheres around, remove heat while pressing, done
            works great for laptop repair

    1. Everything exists for a purpose especially they have to go out of their way to make it.
      The lead frame is like the skeleton made out of a planar sheet of metal. They placed and glue the chip on the center tab of the lead frame, wire bond the pads to the contacts before they mold the epoxy case over it. So each of the internal contacts has to supported until the molding is done.

  4. In that photograph of the upturned chip you can just barely see the metal extending underneath the epoxy encapsulation from the large, central ground pad to the false pads on the edges of the chip.

    As an engineer that has to work with electronics manufacture on this scale I’d be concerned enough about this problem to mention it to my assembly subcontractor in my design file package. It is quite possible that they would request to modify the stencil or alter the paste mixture to avoid this problem during production run builds.

    Great article.

  5. So – I’m a noob, clearly, but can someone explain to me why a chip of any sort would expose a contact like that without a pad – and a circuit board have a solder pad corresponding to that spot – and NOT have them supposed to be connected? I am going to assume there is some purpose – a test point, perhaps? But try as I might, I cannot think of one that wouldn’t cause me to roll my eyes if someone suggested it to me. What is the point of exposing a contact you do not intend to connect to (and that doesn’t appear to be an antenna or such)?

    It strikes me that an exposed conductive contact that alters the behavior of the chip when voltage is applied (or ground), and has no functional purpose, is a design flaw. Call me nutty. If they have a structural purpose, maybe making them non-conductive would be a good thing…

    Or maybe there’s some subtle bit of genius here that I am missing – in which case, enlighten me, please. In small words, assuming I am not a professional SMT technician. I seek to learn.

    1. There is a thin layer of the *non-conductive* mold between the PCB and that extra contact. OP *solder* it to the trace by mistake. If OP had followed the guideline to extend the pad beyond the package, may be OP won’t solder that by mistake. So this is not the vendor’s fault.

    2. Not with reasonable cost.

      Metal tabs is easier to automate in process. Just lay a sheet of metal with a lot of the pad cutout, wirebond the chip, mold and cut the tabs. More in line with the process used to make the other pads (or pins).

      The alternative would need to cut the pads before molding, which need precise positioning for each pad (instead of one for each sheet). Or to mold the package twice

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