A common enough microcontroller project is to create some form of logic analyzer. In theory, it should be pretty easy: grab some digital inputs, store them, and display them. But, of course, the devil is in the details. First, you want to grab data fast, but you also need to examine the trigger in real time — hard to do in software. You may also need input conditioning circuitry unless you are satisfied with the microcontroller’s input characteristics. Finally, you need a way to dump the data for analysis. [Gusmanb] has tackled all of these problems with a simple analyzer built around the Raspberry Pi Pico.
On the front and back ends, there is an optional board that does fast level conversion. If you don’t mind measuring 3.3 V inputs, you can forego the board. On the output side, there is custom software for displaying the results. What’s really interesting, though, is what is in between.
The Pico grabs 24 bits of data at 100 MHz and provides edge and pattern triggers. This is impressive because you need to look at the data as you store it and that eats up a few instruction cycles if you try to do it in software, dropping your maximum clock rate. So how does this project manage it?
It uses the Pico’s PIO units are auxiliary dedicated processors that aren’t very powerful, but they are very fast and deterministic. Two PIO instructions are enough to handle the work for simple cases. However, there are two PIOs and each has four separate state machines. It still takes some work, but it is easier than trying to run a CPU at a few gigahertz to get the same effect. The fast trigger mode, in particular, abuses the PIO to get maximum speed and can even work up to 200 MHz with some limitations.
If you want to try it, you can use nothing more than a Pico and a jumper wire as long as you don’t need the level conversion. The project page mentions that custom software avoids using OpenBench software, which we get, but we might have gone for Sigrok drivers to prevent having to reinvent too many wheels. The author mentions that it was easier to roll your own code than conform to a driver protocol and we get that, too. Still, the software looks nice and even has an SPI protocol analyzer. It is all open source, so if you want other protocols before the author gets to them, you could always do it yourself.
If you do want a Pico and Sigrok, we’ve covered a project that does just that. Most of the logic analyzers we use these days we build into our FPGA designs.
11 thoughts on “Pico Makes Capable Logic Analyzer”
RLE compression could help make the best use out of the limited sample memory.
And external, SPI bound RAM chip would help. But the USB1.1 limits also the transfers to 12Mbps in the best case.
Don’t use USB then. It has a DMA engine that is much faster.
So what do you suggest to take those data out ? TTL serial ?
100mbit PHY is already prototyped https://github.com/maximeborges/pico-rmii-ethernet
next step would be either RGMII or USB 2.0 PHY
If there are enough remaining PIO blocks maybe SMI could be implemented so one can connect it to a big Raspberry.
I remember having a DMA xfer through the PIO. Basically, the transfer owns the entire data and address bus. I think we buffered in the pio, then requested the bus control. It was fantastic for speed. This was true of several early microprocessors. I do not believe my Pi 3b has such a capability; to add a PIO channel just for this stuff.
Pi 3b has SMI.
What’s going on with the crazy traces on this board?
I suspect, since we can see the first 12 traces on the top of the board, the other 12 are on the bottom, and are longer. To keep the propagation delay the same, the top traces have been extended to match the length of the bottom ones
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