A few years ago [Takaya Saeki] and fellow students of the University of Tokyo, were given a very limited instruction during their ‘CPU exercise’ class, along the lines of:
Take this ray-tracing program written in OCaml and run it on your CPU implemented on an FPGA
Splitting into groups to cover the CPU, FPU, simulator tool, and compiler toolchain, the students started with designing a RISC ISA, then designed a CPU around that. You can follow along with the retrospective writeup of the class, then dive into the GitHub pages for each of the components of the system, although the commentary is mainly in Japanese. Hey, you can google translate right?
The original task was to run a raytracing demo on the FPGA-hosted CPU, but the students went much further, porting Xv6, which is a Unix-like OS intended for educational use, provided by MIT, then ran the OCaml raytracing demo on top of that. Xv6 is intended for x86, not their own ISA, so a significant amount of work was needed on the compiler toolchain. The obvious path would be to port LLVM or GCC, but the group decided it would be more fun to make their C89-compliant toolchain from scratch, and UCC was born!
The original CPU did not have an MMU or interrupt handling, so this needed to be added to the design as well as the simulator. One of the gang added the extra hardware features needed to support the Unix-like OS, producing a new CPU design, which they named GAIA. The final version of Xv6 for the GAIA CPU can be found here. If you want to play around with this, they even made a Javascript version (using emscripten) so you can have a go in your browser! Blimey, and we thought our student projects were hard, let alone doing this much for extra credit!
Now, we know what you’re thinking — the number one question — can it run doom? We don’t know yet, but here on Hackaday, there’s always another one around the corner that can.
And here I was proud that the CPU I created for my processor design class could execute one instruction in simulation…
The only instruction my CPU understands is either NOP (or a relative jump to the same address).
But it can do that with zero power applied…
How much Write-Only Memory does it have?
Now that’s an impressive project!
Someone is going to want to hire these students PDQ.
Meanwhile, 2 years ago in Poland at my alma mater Gdańsk University of Technology few of my classmates completed their master thesis where they developed basic WebForms (sic!) websites. Says a lot about our failed educational system and why we’re still considered a 3rd world nation where major corporations outsource only basic manufacturing operations. Sure there were also more ambitious projects like 3D game engines or something with image recognition but still it’s closer to high school projects than something for masters diploma after 5 years of studying computer science.
For my final year project as an undergraduate I had to create a (simple) programming language and cross-compiler.
My first year i wrote a spreadsheet, the second a compiler for a lazy functional language. In Prolog. The third year the VM and linker for it and for final year an OS kernel and a raytracer. This was 88-91 before Linux or Windows. In a third world country. And recently I did not getba job for lack of experience….
Still Polish and Russian students finish in the top at the ACM ICPC coding competition.
Not fair! These guys got to fiddle with FPGAs. All we got was a bucket of NANDs, registers, buttons, switches, LEDs, loooots of banana-plug-wires and a little over two hours to build a simple calculator that was hand fed instructions by using buttons for input and clock.
The only FPGA we ever saw in my undergrad was running a pre-made simulation of an Intel8080, so we could test the Assembly programs we had to write for it.
Check out https://tryengineering.org/tryengineering-community-resources/fpga_boot_camp-slides-flyer-and-spreadsheets/
My effort to make FPGAs more accessible to pre-college and at minimum cost.
Slides have reached the point where an instructor is not required.
Wiring not required: the wires are in the chip and in the PCB.
You could have made your own FPGAs then: http://blog.notdot.net/2012/10/Build-your-own-FPGA
Small correction: current versions of Xv6 target RISCV-32 and not x86
Very appropriately Japanese Hello World using SL!
https://github.com/mtoyoda/sl