It’s Ethernet, From An SPI Interface

Over the years as microcontrollers have become fast enough to do the heavy lifting, we have become used to 10 megabit Ethernet being bit-banged from interfaces it was never meant to emerge from. We think however that we’ve never seen one driven from an SPI interface, so this one from [Ivan] may be a first. With a cleverly designed transceiver using logic chips, it even offers a chance to understand something about the timing of an Ethernet interface, too.

The differential logic signals derived from a simple Ethernet transceiver can be read by an SPI bus, but for the lack of a clock line. The challenge was then to construct a circuit the would construct the required clock pulses from the state changes on the data line. This would become a monostable with XOR gate, and a shift register to handle the clock during the preamble phase.

The resulting circuitry fits neatly on a shield for the ST Nucleo 64 board, where while it might not be the obvious choice for an Ethernet shield it certainly does the job.

If unexpected Ethernet is your thing, how about the i2s peripheral on an ESP8266?

37 thoughts on “It’s Ethernet, From An SPI Interface

    1. “My discrete computer lacks two major things: sound and network. The project I describe here is the first step to making it capable of network communication. I don’t touch the computer itself now, but instead build a transceiver which converts a 10BASE-T Ethernet signal to SPI and back. I use an STM32 MCU to test my transceiver for now. In the future I plan to connect the transceiver to the discrete computer.”

          1. Don’t forget reinventing the tools to make the screwdriver.

            And the tools to make the tools to make the screwdriver.

            And so on, until you turn into the Primitive Technology guy.

          1. My comment above was supposed to say “insert that meme with Leonardo DiCaprio squinting here” but I put it in angle brackets and WordPress got rid of it. Oh, well. Now it’s even less funny.

    2. Not sure why when a W5500 is < $10 on breakout with RJ45 jack and does this exact job and better.
      I am all for designing things myself, but when a chip is low cost and does what I need, I dont reinvent the wheel. except maybe a PIC10F instead of a 555 :)

        1. Wouldn’t implementing a proper Ethernet interface on an FPGA be a more worthwhile task and closer to what is actually used than hacking it together with a microcontroller and a few discreet components?

      1. The biggest problem with a W5500 is it can only provider one raw socket for secure transmission. Up to 8 tcp or up, but if you need tls you’re down to one. This actually sounds like a good idea to me. There are precious few MAC chips left on the market, if you need tls on an mcu. If stm32 or nrf52 or even CC3220 came with a builtin MAC we would have very different possibilities

    3. its learning from basics

      >doubt it handles all protocols

      see, this comment is a clear evidence you could use some of that learning :) You have no clue how any of this magical “ethernet” works other than press button receive bacon.

      >W5500 is < $10 on breakout with RJ45 jack and does this exact job and better

      no, W5500 is MAC&PHY and limits (no fragmentation) you to whatever build-in TCP/IP stack supports. Above project is low lever PHY implementation pushing raw data stream to your software stack.

      1. Exactly. It handles no protocols except Layer 1 ethernet, so anything your mcu is able to frame into a valid L1 stream can go over it. Maybe even AES-10, though that would be a miracle indeed.
        Anyway, 4 data bits and a data valid is all you get at this level

  1. The whole point of doing it is to do things the old-fashioned way — like making a computer from 74xx parts or even discrete transistors/diodes … I mean, who wouldn’t love to solder in just over 3 000 transistors to recreate a 6502 CPU. (Sorry, I think I got a bit carried away there.)

    I love to solve puzzles, which is basically a waste of time and rarely particularly educational, whereas many of these types of projects are not only educational but shows off people’s ingenuity.

  2. Microchip had the SPI->Ethernet 10Base-T ENC28J60 for about 15yrs+ and the 10/100 ENC28J600 for about as long..

    AS WELL as the PIC18FxxJ60 MCUs with built-in 10Mb Ethernet for also about 15yrs.

  3. Microchip has had 2 SPI->Ethernet controllers for around 15yrs.

    The ENC28J60 (10base-T) and ENC28J600 (10/100base-T).

    Also for about the same length of time, Microchip has had the PIC18FxxJ60 family of microcontrollers that have built-in EtherMACs with PHY right in the package. All that’s needed is is external magnetics, a jack and a few passive parts.

    I’ve made several projects with them.

    1. I don’t see why. It’s a PITA….

      Microchip’s SPI->EtherMACs made this a breeze over 10yrs ago.

      That’s why the discussion is probably so thin.

      Those of us who have been around long enough realize this article is a bit of bunk.

      The claim of “bit bangling” and “doesn’t exit” are both not true.

      We’ve been using the PIC18FxxJ60 series for years…

      This article is kinda like, “LOOK! I CREATED NEVER BEFORE EXISTING NETWORKED GAMES!!” in 2022..


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