Etch your own CPLD development board

etch-your-own-cpld-breakout

Ever wanted to make the jump from microcontrollers to logic chips? Although not technically the same thing we consider FPGA and CPLD devices to be in similar categories. Like FPGAs, Complex Programmable Logic Devices let you build hardware inside of a chip. And if you’ve got the knack for etching circuit boards you can now build your own CPLD development module. Long-time Hackaday readers will remember our own offering in this area.

Our years of microcontroller experience have taught us a mantra: if it doesn’t work it’s a hardware problem. We have a knack for wasting hours trying to figure out why our code doesn’t work. The majority of the time it’s a hardware issue. And this is why you might not want to design your own dev tools when just starting out. But one thing this guide has going for it is incremental testing. After etching and inspecting the board, it is populated in stages. There is test code available for each stage that will help verify that the hardware is working as expected.

The CPLD is programmed using that 10-pin header. If you don’t have a programmer you can build your own that uses a parallel port. Included on the board is an ATtiny2313 which is a nice touch as it can simulate all kinds of different hardware to test with your VHDL code. There is also a row of LEDs, a set of DIP switches, and a few breakout headers to boot.

Comments

  1. Sweeney says:

    Given you can pick a new, ready built 5k LUT FPGA dev board up off of eBay these days for $20 I’m not sure this has much practical purpose other than the challenge of building the board.

    • Greenaum says:

      So is there much use for CPLDs now then? Are FPGAs squeezing them out? Are they making cheaper FPGAs to compete in that market? I’m not entirely sure of the line between CPLD and FPGA. I’ll go look it up but I’d be interested to know what people think.

      Are CPLDs still cheap enough in quantity to use in consumer stuff? And are the cheap ones enough use for what people want from a TV etc now?

      • Pat says:

        CPLDs and FPGAs target different markets. FPGAs replace large, complicated devices (ASICs). Low end FPGAs still have 100+ pins, and have milliamp-to-amp quiescent currents. CPLDs replace simple on-board dedicated logic (i.e. discrete 74-series stuff), have comparably very few pins (which is a benefit if you only need a few), and have microamp-to-milliamp quiescent currents.

      • Sweeney says:

        Not what I said. In commercial designs CPLDs may be preferable for cost and power reasons, but they are FAR less capable than FPGAs (equivalent to a maximum of a few hundred LUTs in a FPGA). As a development board, built in one-off quantities you’re going to spend about the same as an off-the-shelf FPGA board but get a less capable device.

        • Pat says:

          You get a *different* device. They do very different things. I don’t understand your point. If you need a board to play around with an FPGA design idea you have, you build an FPGA development board. If you need a board to play around with a CPLD, you build a CPLD development board.

          I mean, this one actually uses a PLCC socketed part, which could be developed on this board, then popped out and put in a full design once it does what you want, and you wouldn’t have to bother with a JTAG header on the full design.

      • eric says:

        Some vendors (lattice for example) offer CPLDs that are actually small FPGAs (though still bigger than most ‘real’ CPLDs) with integrated program memory.

        • dizot says:

          Yes, the Lattice MachXO2 CPLDs are more akin to FPGAs. I believe the biggest [historical] difference between an FPGA and CPLD is the integrated bitmap storage. The MACHXO2 CPLDs don’t require external memory for storage of the image…and with several thousand LUTs, they’re basically in FPGA territory. For about $30USD, they offer a complete dev board with built-in FTDI-based programmer and some LEDs. I’ve used one to create a 96-channel PWM driver. It’s really simple to program Verilog or VHDL for applicatrions like that. And their free development suite [Lattice Diamond] is very nice, too.

          • Pat says:

            Not really. The biggest historical difference between an FPGA and CPLDs is routing. CPLDs have a single routing matrix product terms in it (so you can generate ultra-huge logic functions, like a 54-input AND gate or something silly, which only has a single propagation delay). This doesn’t scale to thousands of logic blocks.

            So FPGAs (the first one being the XC2064) have a programmable interconnect between its logic blocks. That is, each logic block only has a couple of inputs (3 in the first one, 5 in modern ones), and those inputs hook to the interconnect, which is programmed. So you can’t generate 54-input AND gates in one shot: you have to cascade them through bunches of blocks, which adds delay.

            Depending on the logic required, a $1 CPLD can be faster than an FPGA a hundred times more expensive. They’re just different devices.

            The MachXO2s are architecturally FPGAs. Lattice just calls them CPLDs because they’re small, but they’re “lots of LUTs plus a programmable route.” Their ispMACH series are traditional CPLDs. (You may notice that the MachXO2s are on their FPGA page, but the ispMACHs are not).

  2. supershwa says:

    Going to save this one. While my collection of tools and workstation are growing significantly, I’m still considered a novice in the world of small electronics, and I love building from scratch.

    It’s time for me to graduate from my ATmega328 and Parallax Stamp 2 microcontrollers to the world of logic chips anyway, so I don’t have to worry about getting teased by the pros for using arduinos. ;)

    Can anyone recommend a good (the best) CPLD book? I swear, I’m putting Amazon employees’ kids through college with all the stuff I’m buying there…

  3. Tyler says:

    People still use CPLD’s? And not for initializing FPGA’s?

    • Nova says:

      And why not? It’s basically enough logic elements to glue together most projects, not everyone needs to run a NIOS inside their virtual cores(or have one for that matter). Also it’s a -GREAT- starting point since you don’t need to learn the difference in a SOF, POF, and JIC files(Alteras examples), chip specific conversions etc.

  4. Nice JTAG for this stuff is described as “Uniwersalny programator JTAG/ISP” on http://ep.com.pl/Archiwum/2008/Pa%C5%BAdziernik.html – it’s universal one, based on CPLD :-)

  5. Galane says:

    This is the kind of stuff the new Heathkit company needs to make.

  6. jc says:

    More interesting would be finding a PAL/CPLD/FPGA that’s programmable with only open source tools.

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