An Old 68000 SBC is New Again

[Jeff Tranter] has done a number of retrocomputing projects. But he wanted to tackle something more substantial. So he set out to build a 68000-based single board computer called the TS2 that he found in a textbook. He’s documented it in a series of blog posts (about 30 posts, by our count) and a video that you can see below.

The 68000 had a very rational architecture for its day. A flat memory space was refreshing compared to other similar processors, and the asynchronous bus made hardware design easier, too. While most CPUs of the era assumed bus devices could perform their service in a fixed amount of time, the 68000 used a handshake with devices to allow them to take the time they needed. Most other CPUs had to provide a mechanism for a slow device to stall the bus which was complicated and, in many cases, less efficient.

[Jeff] used KiCAD with an autorouter to lay out some PCBs and all his files are available on GitHub. [Jeff] is actually on his second version, and has substituted some hard-to-find parts with easier-to-source replacements. The detail in the postings is impressive, and the TS2 recalls a time when you couldn’t get your entire system in one IC package.

You didn’t hear it here, but a lot of 68000s escaped into the wild with some defects that affected very particular instructions. For example, if you have one, try doing a long quick add (ADDQ.L) to any indirect address register. It might work, but there is a reasonable chance the CPU will hang mysteriously. In those days, there was no firmware upgrading, either.

We’ve seen 68000s on a breadboard. We’ve even seen the 8-bit version dominated by an Arduino. It would be interesting to see what a modern PC would be like if the 68000 architecture had won the day back them. But we’ll never know.

 

20 thoughts on “An Old 68000 SBC is New Again

    1. Well as a former failure analyst for Motorola (I’ve taken apart many a 68000 in my day), I will tell you it didn’t feel like it won the day. I mean sure, by that measure Morse code “won the day” because it was the roots of HDTV.

      1. One of the great what if’s is what if Motorola had the 68008 in time for IBM to have used it for the PC.
        The other great if is what if Motorola and Digital research had made a reference design for other companies to produce to compete with the PC.

    1. Well, you know what I mean. But I did change that a bit. Where I have been bit before is when the poster puts up a new post or two before we go “to press” and then my count looks wrong.

    1. Those are still commonly available through digikey, mouser, or small guys like jameco.

      The 68000 is whats getting harder to find now a days unless you like watching ebay all day long.

      1. You can get 68008 from Mouser. Not the same as a 680X0 but available.

        I’ve been following the Gryphon and KISS-68030 threads over on RetroBrewComputers.org with lust, except the idea of tracking down a 68030 of dubious heritage.

  1. Great work.

    Has anyone done one with a venerable TMS9900? That beautiful big 64 pin ceramic DIL package hid a nifty CPU with 16 16 bit registers, but only 3 were on the chip. There could be any number of 16-register sets in RAM, and instead of pushing bunches of registers on an interrupt, you’d just change the Workspace Address register, and in one instruction have either a complete fresh set, or a previously set-up set, with old values retained.

    Its programmable barrel shifter was rather nifty for e.g. the CORDIC algorithm too.

    1. It’s a pig WRT supply voltages though (needing +5, -5 and -12V), and needs a complex 4 phase clock. It’s also limited to around 3MHz. The 68K was a vastly superior bit of hardware.

  2. A little epiphany:

    @9m30s jess states that he checked all connections with a DMM because it’s very easy to get confused (intermittently) when working with the mirror image / bottom of the board. (Been there, done that & Yes, it’s pretty confusing sometimes).

    Since he already has drawn the schematic in KiCad (and found some errors that way) he could also have easily use the ratsnest to optimise the pcb design.
    And when placing the components on the bottom of the pcb you can easily click a single pin and use the ratsnest function to show you which wires to wire-wrap to each other.
    This saves a lot of time when doing hundredths of connections on a board like this.

  3. “While most CPUs of the era assumed bus devices could perform their service in a fixed amount of time, the 68000 used a handshake with devices to allow them to take the time they needed. Most other CPUs had to provide a mechanism for a slow device to stall the bus which was complicated and, in many cases, less efficient.”

    Huh?

    You seem to be trying to point out a substantial difference here, but the message is lost.

    1. Rather than using fixed wait states, a 68k bus cycle will not complete until its data acknowledge input is asserted by an external device. You can still find some peripheral chips (eg. UARTs) that are available in two versions, for synchronous buses and the 68k bus.

    2. On many processors, there is some base cycle time. If the CPU issues a read or write to a device or memory it expects it to take less than one time period (say 8 clock cycles). If not, then you have to assert the wait which will then make the device wait longer.

      With the 68K the bus was asynchronous. After a read or write was issued, the bus stayed engaged until you asserted DTACK. Same effect, but the bus cycle waited for a positive handshake from the device as opposed to expecting the device to say WAIT! WAIT! WAIT!

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