$10 camera module for your next FPGA project

Here is [Voelker] showing off his FPGA-based camera hardware. He picked up an ov7670 camera on eBay for about $10 and set to work pulling pixels and processing the images. He’s now able to grab thirty frames per second and push them to his own Java display application. He’s using the Papilio board and if you want to give this a try yourself you might be able to snag a free breakout board (wing) for the unit.

[Voelker's] approach is to grab each frame, and get it ready for quick serial transmission. The incoming frames are at 640×480 resolution. He scales that down to 80×60 and transmitted at 3M baud. The hardware resources used are actually quite light-weight. He wrote his own modules for transfer and photo processing using very little RAM for downscaling and one 128 byte buffer for data transmission. It sounds like he plans to use the camera to view and detect a line to create his own line-following robot.

Wondering where you’ve seen the ov7670 module before? It’s the part used on the TRAKR robot.

Fractal viewer can zoom and enhance like on CSI

This fractal viewer is a great way to get your feet wet with Field-Programmable Gate Arrays. The project will give you some experience working with video output, user input, and a whole bunch of math and memory management. [Hamster] built it using the Papilio Plus board which hosts a Spartan 6 FPGA. This continues his odyssey into the realm of hardware design; part of which we looked at back in December.

The arcade Megawing for the dev board gives him easy access to the controls needed to scroll and zoom on the fractal design. Calculations to generate the shape are being run at 240 MHz, with the VGA output running at 80 MHz. The device has enough horse power and SRAM to show an 800×600 pixel output with a 60 Hz refresh rate.

We really liked the logic diagram that [Hamster] drew up when planning how the calculations would be handled. It’s not overly complex, but it took us a while to conceptualize how everything fits together. It’s certainly an improvement from his last attempt as we couldn’t make heads or tails out of that flow chart.

If you’re just interested in the pretty shapes and colors there’s a demo embedded after the break.

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Simulating VHDL of an AVR8 soft processor

Okay, now we’re beginning to feel a bit like [Alice]. This tutorial shows you how to simulate VHDL code. This code is intended to run on an FPGA and includes a software-only version of the AVR 8-bit microcontroller core. Essentially, you’ll simulate VHDL code that simulates AVR hardware. Wrap your mind around that!

The code is intended to run on a Papilio Field Programmable Gate Array development board. We saw an early version of this board running the AVR8 core about a year ago. However, you don’t need to have any hardware to follow along and recreate this simulation yourself. It might be a great way to get your feet wet with FPGA programming before making that first hardware buy. Five different screencasts take you through the process of getting the AVR8 code, using an altered Arduino IDE for it, setting up a free version of Xilinx ISE to run the simulation, then setting it free and interpreting the data that the simulator spits out the other end.