We have talked about a whole slew of logic and interconnect technologies including TTL, CMOS and assorted low voltage versions. All of these technologies have in common the fact that they are single-ended, i.e. the signal is measured as a “high” or “low” level above ground.
This is great for simple uses. But when you start talking about speed, distance, or both, the single ended solutions don’t look so good. To step in and carry the torch we have Differential Signalling. This is the “DS” in LVDS, just one of the common standards throughout industry. Let’s take a look at how differential signaling is different from single ended, and what that means for engineers and for users.
Collectively, standards like TTL, CMOS, and LVTTL are known as Single Ended technologies and they have in common some undesirable attributes, namely that ground noise directly affects the noise margin (the budget for how much noise is tolerable) as well as any induced noise measured to ground directly adds to the overall noise as well.
By making the voltage swing to greater voltages we can make the noise look smaller in proportion but at the expense of speed as it takes more time to make larger voltage swings, especially with the kind of capacitance and inductance we sometimes see.
Enter Differential Signaling where we use two conductor instead of one. A differential transmitter produces an inverted version of the signal and a non-inverted version and we measure the desired signal strictly between the two instead of to ground. Now ground noise doesn’t count (mostly) and noise induced onto both signal lines gets canceled as we only amplify the difference between the two, we do not amplify anything that is in common such as the noise.
LVDS, CML, and LVPECL
There are various standards with the more common ones being Low Voltage Differential Signaling EIA/TIA-644 (LVDS), Current Mode Logic (CML) and Low Voltage Positive Emitter Coupled Logic (LVPECL). Other examples of Differential Signaling in general include the older RS-422/485 which was used to extend the range of the common single ended signaling known as RS-232, (the “standard” serial port).
LVDS is also used in Serial ATA (SATA), Firewire, gigabit Ethernet and PCIe as well as often being used to communicate to LCD panels. CML is the underlying technology of HDMI and uses current flow instead of voltage as the name implies.
A quick way to demonstrate an LVDS signal is to utilize the fact that the outputs of many FPGA’s and CPLD’s are programmable as to the type of interface standard.
CPLD/FPGA as a Demo
First we create a quick counter right off of the 25Mhz master clock, I used a schematic entry for the top level:
I created lots of different outputs to give myself options while making the video but ultimately just used a clocked version of the 25Mhz.
Next we go to the Assignment Editor for the part and simply select LVDS as the pin type. By selecting one pin it automatically assigns the pair to complete the Differential path.
In this CPLD there is really just one differential standard to select (LVDS complete). Other CPLDs/FPGAs may have a wider selection and may require the use of external resistors or other components depending on the device and selected standard. They may also require the use of the same standard in a block of pins or along one whole side of the part.
Shown here is the PCB schematic showing the pin assignment with the insert showing the ribbon cable pin-out for differential signals. Note the ground connections interspersed between differential pairs on the 30 pin ribbon cable connector.
The LVDS standard is to develop 350mv across the resistor at the end of the path known as the termination resistor. This value is chosen to best match the impedance of the signal path, with values between 100-120 Ohms typical for cables and PCB layout. As speeds go up we get real serious about calculating and controlling the impedance throughout the entire path.
On the example on the workbench shown here there is no receiver, just the termination resistor. At these speeds and in this type of application it is best to dispense with a long ground lead on the scope probe, the slid-on ground clip is shown here instead.
Using the oscilloscope’s built in math function I can simulate what happens in a differential receiver by subtracting one signal from another. Anything common to both, sometimes called common mode noise or a common mode component, is canceled out by this subtraction. In the case where radiated noise is impinged upon both conductors equally , the noise cancellation works well. To this end, techniques such as twisting the cable conductors is common, with the more twists per inch offering better noise reduction but with increased cost, weight, and reduction in flexibility.
Seen here the individual traces are shown and then overlaid, and then the difference taken, with the final reconstructed waveform in red.
Bear in mind that we are talking about just the physical signaling here and does not cover encoding scheme where transitions are minimized, or the clock and signaling is embedded in the data flow.
To optimize high speed performance or to assist in converting from one standard to another, DC blocking may be employed through use of capacitors in series with the data stream. DC blocking also allows the receiver to operate right in the DC bias area that is best for it to reduce noise and things like “jitter” which is a variable delay in the signal.
Removing the DC component, i.e. AC coupling the signal, comes at a price however. AC coupling requires that the signal always be seen as in motion or making transitions on a regular basis.
In the case of an encoding scheme that represents a logical “1” by a transition of the signal and a “0” by no transition, AC coupling then requires that a minimum of transition occur every so often so that the DC baseline of the signal doesn’t drift off. Without AC transitions coupling through the series capacitors driving the input from a high to a low, the voltage would decay and drift towards a unusable value.
An 8b/10b encoding scheme uses 10 bit symbols to represent 8 bits of data while “stuffing” some transitions into the flow so that too much time doesn’t pass without a transition. Telco’s have been using the schemes for many years for sending information over long distances of twisted pair wire using differential signals.
Off the Shelf
There is wide range of discrete drivers and receivers in the various technologies and as you would expect, the vendors’ web pages provide excellent product selection tools. In the old days we had to read or at least glance at every databook on the subject at least once and then narrow down the search by carefully digesting the specifications. Here is TI’s excellent selector that also includes what used to be National Semi:
As you would expect in this day there is a large amount of data available on the Internet. One of my favorites is the LVDS Owner’s Manual which is available from many vendors. I keep a printed copy of this in my lab.
Hopefully this starts to put a tool in your toolbox: If you need to go fast, far or through a noisy environment then consider Differential Signaling.