Lattice Drops EULA Clause Forbidding FPGA Bitstream Reverse Engineering

Yesterday we reported that Lattice Semiconductor had inserted a clause that restricted the reverse engineering of bitstreams produced by their FPGA toolchains. Although not explicitly stated, it’s assumed that this was directed toward several projects over the past five years that have created fully open source toolchains by reverse engineering the bitstream protocols of the Lattice ICE40 and ECP5 FPGA architectures. Late yesterday Lattice made an announcement reversing course.

To the open source community, thank-you for pointing out a new bitstream usage restriction in the Lattice Propel license. We are excited about the community’s engagement with Lattice devices and our intent is to not hinder the creation of innovative open source FPGA tools.

It’s refreshing then to see this announcement from Lattice Semiconductor. Even more so is the unexpected turn of speed with which they have done so, within a couple of days of it being discovered by the open-source community. We report depressingly often on boneheaded legal moves from corporations intent on curbing open source uses of their products. This announcement from Lattice removes what was an admonition opposing open source toolchains, can we hope that the company will continue yesterday’s gesture and build a more lasting relationship with the open source community?

The underlying point to this story is that in the world of electronics there has long been an understanding that hardware hackers drive product innovation which will later lead to more sales. Texas Instruments would for years supply samples of exotic semiconductors to impecunious students for one example, and maybe you have a base-model Rigol oscilloscope with a tacitly-approved software hack that gives it an extra 50MHz of bandwidth for another.

We can only congratulate Lattice on their recognition that open source use of their products is beneficial for them, and wish that some of the other companies triggering similar stories would see the world in the same way. Try interacting more with your open source fans; they know and love your hardware more than the average user and embracing that could mean a windfall for you down the road.

33 thoughts on “Lattice Drops EULA Clause Forbidding FPGA Bitstream Reverse Engineering

  1. Great news and great story, Jenny. Thanks for sharing. FPGA’s are a bit over my current technical skill set, but I’ll keep Lattice in mind for the future. I HAVE been the beneficiary of a significantly price reduced TI microcontroller board, however! :-)

  2. Ack, don’t bring up the TI samples cutoff. That’s a dagger in an open sound. They ban samples from *all* edu addresses, even non-students trying to get real samples for research projects. Prototyping takes me days longer because I have to deal with crap purchasing departments now. Sigh.

    Good on Lattice for doing this. Now make small parts with LVDS drivers on all pins please.

    1. That’s what happens when people start abusing a service. Something like 20 years ago, Motorola would send you paper copies of any of their documentation, free of charge, anywhere in the world. Once this started becoming more widely known, they shut the service down. I still have the PPC architecture manual I ordered pretty much because I could. It’s an on-demand print on the thinnest paper possible, but it’s still a pretty thick volume.

      1. That brings back some old memories! I remember ordering the 68030, 68040 and PPC604 manuals from Motorola and being frankly amazed when three bulky books turned up in the post, completely gratis. I learned a lot about processors from those and was very grateful for the service, but I can totally understand why it wasn’t viable long-term. Still have those books somewhere, I should look them out.

        1. Intel too. Until recently I had a copy of the 8048 et al reference manual. Properly bound, 4″ thick and something like 2k pages of the cheapest recycled paper. Provided Foc because I said I wanted to write a simulator..

      2. I figured hobbyists were screwed for samples when I started seeing them on eBay a decade and a half ago, then not long after that, those “MAKE $$$dollardollar ON EBAY!!!!!!” screeds were exhorting randoms to get free chips samples, along with the usuals like shovelware-ing CDs full of public domain texts and etc.

      3. When I was in college and messing around with HC11, I went to the local Motorola sales office to get manuals. They had a large room filled withb all sorts of databooks, manuals, and even floppies with SPICE models.

        Fifteen years later I found myself in a position to choose a micro for a product, and that goodwill played a small part in my decision to choose Freescale (formerly Motorola).

      4. “That’s what happens when people start abusing a service.”

        Well, it’s not *necessarily* what happens, just what happens when lazy companies notice people abusing things. It’d be freaking trivial for TI to add a verification process to edu email addresses. They could also just offload the verification to the actual university itself, saying “hey we’re giving you X people that can order samples, it’s up to you to manage who’s allowed to do what.”

        I mean, the electronics companies are so large now that honestly they could create a paid “partner program” with universities that gives them access to samples and support, and most places would do it. And in return they not only expose future engineers to their products, but they also get the wacko weird testing that universities do in return.

        1. How is it trivial to verify all the educational institutions in the world? Or does your world end at the border of USA?

          Anyway nice work Lattice for fixing the issues so fast.

          1. “How is it trivial to verify all the educational institutions in the world?”

            Because the educational institutions you care about are very long lived, so you only have to do it *once*. You just need to come up with some criteria, have some legal criteria, have someone at the college agree to it, yada yada yada. Some vendors already have stuff like this, but some vendors (TI, Lattice) just decided to stop working with people at edu addresses pretty much at all.

            Appropriate to the article, Lattice is especially bad. They refuse to accept edu addresses at all for tech support inquiries. I’ve had to have tech support inquiries routed through friends at other companies. And this is for stuff like “your documentation is just flat out wrong, can you confirm.”

  3. Good for Lattice for stepping up so quickly. I’ve been looking into the iCE40 UltraLite parts for a project, in part because of the availability of open source bitstream tools based on reverse engineering. Why? The quality of FPGA vendor provided proprietary tools is a constantly shifting world of suck, often costing the developer a bleeding fortune in time and money. I’d love to see Lattice take the next logical step and *PUBLISH* their bitstream format.

    And a big hint to the FPGA vendor community: Developer tools should *NOT* be a profit center.

  4. So, prior to the open source toolchain being available for lattice FPGAs they were not a 1st tier FPGA vendor… They were below Xilinx and Altera but above Microchip. While I wouldn’t say they’re a top tier vendor now, their prominence has been on the rise as students and hobbyists get comfortable enough with their chips to suggest using them in projects at the old “day job”.

    I suspect that they (like other FPGA vendors) license their tools from 3rd party vendors who (unlike the chipmakers themselves) have every reason to oppose open source toolchains. The argument that FPGA vendors benefit from the closed nature of the toolchain is spurious in my opinion because most major vendors (at least Xilinx and Altera) publish the internals of their cells and of the interconnect matrix in exhaustive detail because, even when customers are writing in HDL using behavioral modeling, understanding the underlying structures the output must ultimately map to has a profound impact on fit and timing closure and thus on how much customers can hope to get out of their given cost, board space, and power budget.

    An FPGA vendor whose parts were well enough supported by an open toolchain that they no longer needed to license proprietary synthesis, simulation, or place-and-route tools would have a real leg up over competitors for cost-sensitive applications, and I expect we will see this start to happen (much like gcc has been slowly displacing ARM’s compiler as more and more vendors embrace it).

    1. Did that not used to be the philosophy though? Seemed when a part was new Motorola or Intel would have a bare bones compiler to get things moving, and expect or not mind when the ecosystem supported something better.

    1. And when you do I’m sure you’ll quickly find out how restrictive the ice40 devices are. So as a heads up, project icestorm supports the ice40 and project trellis, part of symbiflow, supports the bigger lattice ECP5 series (which does support LVDS BTW) which are a bit meatier.

  5. The FPGA vendors want to sell chips, not software. Anything that helps them to sell more chips and increase their share of the FPGA market will be positively reinforced. (if they’re smart)

  6. Been working on a design on a Lattice MachXO2 this year for a project at home. Seems like they’re the only fpga chips that still have pins and don’t require running a linux VM on windows to use their software. I should see if the open source hdl packages support these chips though

    1. Or you can remove then yourself, not very difficult considering it’s an open source compiler. They get money from the corporate world whilst hobbyists can enable optimisations with a little effort.

  7. I hope that the open-source friendly stance pays dividends for Lattice. I refused to look at FPGAs for decades until open source tools were available. Proprietary tools were awful. Fingers crossed that IceStorm results in significantly increased hardware sales.

  8. I’ll summarise my last post to this thread which had lots more detail that was deleted for some unknown reason.
    2015: market share 3% (Project IceStorm First public release and short YouTube video demo)
    2016: market share 3%
    2017: market share 6%
    2018: market share 6%
    2023: much less than 6% because of bad management decisions ?

    There is a time delay for traction, and loss of traction.

  9. These kind of EULAs don’t have much power in many european countries and big vendors might only get at you for publishing ‘trade secrets’, but: Nice move, Lattice. It’s too late to stop the running horses.

    It’s also about playing fair. I keep seeing plenty of Semiconductor companies happily borrowing from the GNU world, putting closed source packages together, not always giving back to OpenSource or even bluntly not showing any concern about GPL. (I could put down a few names..).

    And then I keep thinking loud: Ok, you’re making semiconductors, AND made many attempts to create software that would be expected to work like…say GCC, but it often ends up as a quirky quilt and only plays ok within a specific recommended setup (and eats up 18 Gig of HD space). And sometimes just obscurely fails and it’s almost impossible to debug why. Tech Support? No comments.

    So, why not focus, rely on the community and finally get these FPGA tools somewhere where the GNU world has been for the last 20 years. There’s not many secrets in these FPGAs anymore and the barrier of expensive synthesis tools will also break and solutions might become simpler, once moving away from the classical complexities and pitfalls coming with Verilog/VHDL as transfer languages towards synthesis. And get away from the legacy view of pure hardware/software oriented design strategies.

  10. These kind of EULAs don’t have much power in many european countries and big vendors might only get at you for publishing ‘trade secrets’, but: Nice move, Lattice. It’s too late to stop the running horses.

    It’s also about playing fair. I keep seeing plenty of Semiconductor companies happily borrowing from the GNU world, putting closed source packages together, not always giving back to OpenSource or even bluntly not showing any concern about GPL. (I could put down a few names..).

    And then I keep thinking loud: Ok, you’re making semiconductors, AND made many attempts to create software that would be expected to work like…say GCC, but it often ends up as a quirky quilt and only plays ok within a specific recommended setup (and eats up 18 Gig of HD space). And sometimes just obscurely fails and it’s almost impossible to debug why. Tech Support? No comments.

    So, why not focus, rely on the community and finally get these FPGA tools somewhere where the GNU world has been for the last 20 years. There’s not many secrets in these FPGAs anymore and the barrier of expensive synthesis tools will also break and solutions might become simpler, once moving away from the classical complexities and pitfalls coming with Verilog/VHDL as transfer languages towards synthesis. And get away from the legacy view of pure hardware/software oriented design strategies.

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