Microchip’s new 23K256 is a serially interfaced 32 kilobyte SRAM memory chip, available in 8 pin DIP and 8 pin SO packages. SRAM, like EEPROM, is a data storage medium. Data stored in SRAM is lost without constant power, but it’s really fast and there’s no limits to the number of write cycles. EERPOM stores data even without power, but it’s slow and usually limited to around a million write cycles.
32K SRAM chips typically have 15 address lines and 8 data lines, like the IS61LV256AL we used on our CPLD development board. The 23K256 requires just four signal lines, but sacrifices the speed of a parallel memory interface. It’s a great way to add extra memory to a low-pin count microcontroller without routing 23 signal traces. We’ll show you how to interface this chip below.
|Bus Pirate||23K256 (pin #)
We connected the 23K256 to our Bus Pirate universal serial interface tool as shown in the table. It’s very important to power the chip using only the Bus Pirate’s 3.3volt supply, the 23K256 isn’t rated for 5volts.
The Bus Pirate is an easy way to learn about a chip without writing any code, but the same principals apply to using the 23K256 with any microcontroller. This demonstration uses the latest version of the Bus Pirate firmware (26-FEB-2009), which you can download from our Google Code SVN.
HiZ>m <–choose mode
MODE>5 <–SPI mode
… <–30KHz, all default settings
SPI>W <–capital ‘W’ enables power supplies
VOLTAGE SUPPLIES ON
First, we put the Bus Pirate into SPI mode at 30KHz and chose the default settings for all options. We enabled the Bus Pirate’s on-board 3.3volt power supply with a capital ‘W’.
bit 7,6 = byte (00) page (10) sequence (01) mode
bit 0 = Hold disabled (1)
Data is stored inside the 23K256 in 1024 pages that each contain 32bytes. The scope of reads and writes is set by bit 7 and 6 of the configuration register. Storage can be accessed by the byte (00), by 32byte pages (10), or sequentially through the entire 32K (01). We’ll work in sequence mode, which gives us access to read and write any length of data, anywhere in the 32K of storage space.
The hold pin is used to pause transfers when other chips on the same bus need to be accessed. Bit 0 of the configuration register controls the hold pin. When set to 1, the hold pin is disabled. We tied hold to ground for normal operation, but its functionality can be completely disabled by setting bit 0.
The configuration register is changed by sending the write configuration command (0b00000001) and the new settings.
SPI>[0b1 0b01000001] <–update config register
WRITE: 0×01 <–write config command
WRITE: 0×41 <–value to write
We start an SPI transaction by enabling the 23K256 chip select line ([). We send the write configuration command (0b1, 0x01, or 1), followed by the new settings for the configuration register (0b01000001, 0x41). We set bit 6 for sequential access mode, and set bit 0 to disable the hold pin function. Bits 5-1 have no function, but the datasheet says to always write 0. The transaction concludes by disabling the chip select signal (]).
WRITE: 0×05 <–read config register
READ: 0×41 <–value read
Next, we use the read configuration register command (0b00000101, 0b101, 0×05, or 5) to verify that the settings were properly written. This command returns one byte (r) which should match the value we wrote in the previous operation (0×41, or 0b01000001).
Now we can read and write data to the chip. Writes begin with the data write command (0b10, 0×02, or 2), followed by two bytes which determine where to write the data. The values to store are sent after the address. Depending on the access mode, a single byte, a page, or the entire memory can be filled in a single operation.
SPI>[0b10 0 0 1 2 3 4 5 6 7 8 9 10]
WRITE: 0×02 <–data write command
WRITE: 0×00 <–address byte 1
WRITE: 0×00 <–address byte 2
WRITE: 0×01 <–start of data to write
We start with the write data command (0b10) and set the write location to the beginning of the chip (0 0). We send a total of ten values to store, the numbers 1 to 10.
After writing the data, we can read it back with the read data command (0b00000011, 0b11, 0×03, or 3).
SPI>[ 0b11 0 0 r:10]
WRITE: 0×03 <–read data command
WRITE: 0×00 <–start address byte 1
WRITE: 0×00 <–start address byte 2
BULK READ 0x0A BYTES: <–read out 10 bytes
0×01 0×02 0×03 0×04 0×05 0×06 0×07 0×08 0×09 0x0A
We send the read data command (0b11), followed by the address from which to start reading (0 0). We then read back 10 bytes (r:10). The 10 byte are the numbers 1 to 10, the same values we wrote in the previous step.
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