Parts: 32KB SPI SRAM memory (23K256)

23k256ii

Microchip’s new 23K256 is a serially interfaced 32 kilobyte SRAM memory chip, available in 8 pin DIP and 8 pin SO packages. SRAM, like EEPROM, is a data storage medium. Data stored in SRAM is lost without constant power, but it’s really fast and there’s no limits to the number of write cycles. EERPOM stores data even without power, but it’s slow and usually limited to around a million write cycles.

32K SRAM chips typically have 15 address lines and 8 data lines, like the IS61LV256AL we used on our CPLD development board.  The 23K256 requires just four signal lines, but sacrifices the speed of a parallel memory interface. It’s a great way to add extra memory to a low-pin count microcontroller without routing 23 signal traces. We’ll show you how to interface this chip below.

Microchip 23K256, 32K SPI SRAM (Mouser search, Octopart search, $1.48). Datasheet (PDF).

Bus Pirate 23K256 (pin #)
CS /CS (1)
MISO SO (2)
MOSI SI (5)
Clock SCK (6)
GND /HOLD (7)
GND VSS (4)
+3volts VCC (8)

We connected the 23K256 to our Bus Pirate universal serial interface tool as shown in the table. It’s very important to power the chip using only the Bus Pirate’s 3.3volt supply, the 23K256 isn’t rated for 5volts.

The Bus Pirate is an easy way to learn about a chip without writing any code, but the same principals apply to using the 23K256 with any microcontroller. This demonstration uses the latest version of the Bus Pirate firmware (26-FEB-2009), which you can download from our Google Code SVN.

HiZ>m <–choose mode
1. HiZ

5. SPI

MODE>5 <–SPI mode
MODE SET
<–30KHz, all default settings
SPI READY
SPI>W <–capital ‘W’ enables power supplies
VOLTAGE SUPPLIES ON
SPI>

First, we put the Bus Pirate into SPI mode at 30KHz and chose the default settings for all options. We enabled the Bus Pirate’s on-board 3.3volt power supply with a capital ‘W’.

Configuration register

bit 7,6 = byte (00) page (10) sequence (01) mode
bit 0 = Hold disabled (1)

Data is stored inside the 23K256 in 1024 pages that each contain 32bytes. The scope of reads and writes is set by bit 7 and 6 of the configuration register. Storage can be accessed by the byte (00), by 32byte pages (10), or sequentially through the entire 32K (01).  We’ll work in sequence mode, which gives us access to read and write any length of data, anywhere in the 32K of storage space.

The hold pin is used to pause transfers when other chips on the same bus need to be accessed. Bit 0 of the configuration register controls the hold pin. When set to 1, the hold pin is disabled. We tied hold to ground for normal operation, but its functionality can be completely disabled by setting bit 0.

The configuration register is changed by sending the write configuration command (0b00000001) and the new settings.

SPI>[0b1 0b01000001] <–update config register
CS ENABLED
WRITE: 0x01 <–write config command
WRITE: 0x41 <–value to write
CS DISABLED
SPI>

We start an SPI transaction by enabling the 23K256 chip select line ([). We send the write configuration command (0b1, 0x01, or 1), followed by the new settings for the configuration register (0b01000001, 0x41). We set bit 6 for sequential access mode, and set bit 0 to disable the hold pin function. Bits 5-1 have no function, but the datasheet says to always write 0. The transaction concludes by disabling the chip select signal (]).

SPI>[0b101 r]
CS ENABLED
WRITE: 0x05 <–read config register
READ: 0x41 <–value read
CS DISABLED
SPI>

Next, we use the read configuration register command (0b00000101, 0b101, 0x05, or 5) to verify that the settings were properly written. This command returns one byte (r) which should match the value we wrote in the previous operation (0x41, or 0b01000001).

Data access

Now we can read and write data to the chip. Writes begin with the data write command (0b10, 0x02, or 2), followed by two bytes which determine where to write the data. The values to store are sent after the address. Depending on the access mode, a single byte, a page, or the entire memory can be filled in a single operation.

SPI>[0b10 0 0 1 2 3 4 5 6 7 8 9 10]
CS ENABLED
WRITE: 0x02 <–data write command
WRITE: 0x00 <–address byte 1
WRITE: 0x00 <–address byte 2
WRITE: 0x01 <–start of data to write
WRITE: 0x02
WRITE: 0x03
WRITE: 0x04
WRITE: 0x05
WRITE: 0x06
WRITE: 0x07
WRITE: 0x08
WRITE: 0x09
WRITE: 0x0A
CS DISABLED
SPI>

We start with the write data command (0b10) and set the write location to the beginning of the chip (0 0). We send a total of ten values to store, the numbers 1 to 10.

After writing the data, we can read it back with the read data command (0b00000011, 0b11, 0x03, or 3).

SPI>[ 0b11 0 0 r:10]
CS ENABLED
WRITE: 0x03 <–read data command
WRITE: 0x00 <–start address byte 1
WRITE: 0x00 <–start address byte 2
BULK READ 0x0A BYTES: <–read out 10 bytes
0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0A
CS DISABLED
SPI>

We send the read data command (0b11), followed by the address from which to start reading (0 0). We then read back 10 bytes (r:10). The 10 byte are the numbers 1 to 10, the same values we wrote in the previous step.

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Comments

  1. stunmonkey says:

    32k? That’s totally not enough to run Crysis…

  2. x says:

    if it were than there would less than 32k people asking that question

  3. andre says:

    Might make building a PIC+microSD based mini MP3 player that much easier. Use the chip as the page buffer.

    Don’t know if an 8 pin PIC would have enough grunt to decode MP3s but it ought to be capable of playing short WAV files.

    Will keep you posted

    -A

  4. pokey says:

    @Andre: Last I’d played with it, you would need a minimum 20MHz ARM7TDMI with ~32k of RAM for buffers to decode MP3 in realtime. Somehow I don’t think any 8 bit PIC will be up to it.

  5. Stu says:

    Interesting. Has anybody done a comparison of speed differences between this chip and, say a good quality SPI based EEPROM chip?
    I dont know whether there will be much difference in performance given the SPI interface is the limiting factor.
    Plus why is it Microchip only deal in low capacities and low CPU speeds and power? I mean a ‘brand new’ 32Kb chip in this day and age!?
    Is that why everybody uses Arduino and Atmel AVRs over PICs?
    Dont get me wrong, the primary microcontroller I use is the PIC!

  6. therian says:

    which chip are you talking about?, there is low power low feature family and there is high performance family. Same apply to atmel chips. Comparing features it easy to find almost same chips for all of them

  7. therian says:

    Ok this was last drop, I was tempting to try atmel products but all hardware and software which I bought for PICs over couple years stopped me.
    So what do I need to start in AVR ? AVRISP MKII as programmer will be enough ? (why not free serial? because laptops dont have one)
    Which c compiler have most # of libraries that make life easier ?
    What DIP chip should be easy to learn but still powerful enough. maybe Atmega8 ?

    sorry to post it here

  8. Ian Lesnet says:

    32K is a lot of space compared to most microcontrollers. I’d use this chip to built a big look-up table, buffer data from an ethernet interface, buffer high-speed data acquisition, etc.

    For MP3 decoding, check out the VS1001K or STA013/STA015.

  9. matthias says:

    how do you address 32 KB with 13 lines? I think you need 15 (=log2(32768)). Also, you often use an 8-bit latch as the address is piped out in 2 steps like on the ATmega128.

  10. Ian Lesnet says:

    @matthias – You’re right, my mistake. Corrected.

  11. mike says:

    @stu:
    http://en.wikipedia.org/wiki/Parallax_Propeller

    A PIC, is that like a commodore or something? They got multicore, 64k, 32-bit, mcus now. Get with the times. ;)

  12. DB says:

    SD/MMC have SPI interfaces in addition to the MMC interface. During initialization the SPI mode is activated by a logic level on one of the pins. There’s also a chip-select when in SPI-mode, so you can have more than one MMC.Some knock-off MMC chips may not have SPI, buyer beware.

  13. samurai1200 says:

    if there’s an dip-8 of this chip, whats the point of the breakout board in the picture? lolz.

  14. mendicantmonkey says:

    @samurai1200:

    Maybe the photographer didn’t have the dip-8 on-hand when building the circuit.

  15. NIck says:

    How can you read or write from the chip when you connected the /HOLD pin to GND? IMPOSSIBLE!

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