On modern desktop and laptop computers, there is rarely a need to think about memory. We all have many gigabytes of the stuff, and it’s just there. Our operating system does the heavy lifting of working out what goes where and what needs to be paged to disk, and we just get on with reading Hackaday, that noblest of computing pursuits. This was not always the case though, and for early PCs in particular the limitations of the 8086 processor gave the need for some significant gymnastics in search of an extra few kilobytes. [Julio Merion] has an interesting run-down of the DOS memory map, and how memory expansion happened on computers physically unable to see much of it.
The 8086 has a 20-bit address bus, giving it access to a maximum of 1 megabyte. When IBM made the PC they needed space for the BIOS, the display, and the various accessory ROMs intended to come with expansion cards. Thus they allocated a maximum 640k of the map for RAM, and many early machines shipped with much less than that. The quote from Bill Gates about 640k being enough for anyone is probably apocryphal, but it was pretty clear as the 1980s wore on that more would be needed. The post goes into how memory expansion worked, with a 64k page mapped to switchable RAM on a card, and touches on how DOS managed extended memory above 1 Mb on the later processors that supported it. We dimly remember there also being a device driver that would map the unused graphics memory as EMS when the graphics card was running in text mode, but such horrors are best left behind.
When running a server, especially one with mission-critical applications, it’s common practice to use error-correcting code (ECC) memory. As the name suggests, it uses an error-correcting algorithm to continually check for and fix certain errors in memory. We don’t often see these memory modules on the desktop for plenty of reasons, among which are increased cost and overhead and decreased performance for only marginal gains, but if your data is of upmost importance even when working on a desktop machine, it is possible to get these modules up and running in certain modern AMD computers.
Specifically, this feature was available on AMD Ryzen CPUs, but since the 7000 series with the AM5 socket launched, the feature wasn’t officially supported anymore. [Rain] decided to upgrade their computer anyway, but there were some rumors floating around the Internet that this feature might still be functional. An upgrade to the new motherboard’s UEFI was required, as well as some tweaks to the Linux kernel to make sure there was support for these memory modules. After probing the system’s behavior, it is verified that the ECC RAM is working and properly reporting errors to the operating system.
Reporting to the OS and enabling the correct modules is one thing, actually correcting an error was another. It turns out that introducing errors manually and letting the memory correct them is possible as well, and [Rain] was able to perform this check during this process as well. While ECC RAM may be considered overkill for most desktop users, it offers valuable data integrity for professional or work-related tasks. Just don’t use it for your Super Mario 64 speedruns.
No matter how memory technology marches on, magnetic core memory is still cool. Radiation-hard, nonvolatile, and so pretty. What’s there not to love? [Mark Nesselhaus] is no stranger to fun in-your-face electronics builds — judging from his hackaday.io projects — and this entry to the Hackaday Op-Amp contest is no outlier. This is a sixteen-bit magnetic core RAM demonstrator built upon glass using copper tape and solder, which always looks great and is actually not all that hard to do yourself provided you grab a new scalpel blade from the pack before starting.
For the uninitiated, the crossed X and Y wires each host a hard magnetic toroid which can only be magnetised by a field beyond a certain threshold due to the shape of the B-H curve of ferrite materials. The idea is for a required threshold current, drive the selected X line and Y line each with a current half of this value, so that only the selected core bit ‘sees’ the full field value, and flips state. This means that only a single bit can be written for each core plane, so to form longer words these layers are stacked, producing some wonderful cubic structures. These magnetic circuits are responsible for putting a human on the moon.
Reading the bit state is basically the opposite. A third sense wire is passed sequentially through each bit in the array. By driving a current the opposite way through the selected core bit, if the core was previously magnetised then the sense wire will read a short pulse that can be amplified and registered. The eagle-eyed will realise that reading is a destructive process, so this needs to be followed up by a write-back process to refresh the bit, although the core state will persist without power, giving the memory nonvolatile behaviour.
[Mark] utilises a simple discrete transistor differential transformed-coupled front end which senses the tiny current pulse and passes it along to a Set-Reset latch for visualisation. This simple concept could easily be extended to make this a practical memory, but for now, addressing is courtesy of a pair of crocodile clips and a discrete write/read pulse switch. We will watch with interest how far this goes.
DIY core memory builds are not a regular occurrence around these parts, but we see them from time to time, like this polished 64-bit setup. Core arrays are not the only magnetic memory in town, we’ve also seen DIY core rope memories as well.
The Raspberry Pi was a fairly revolutionary computing device when it came on the scene around a decade ago. Enough processing power to run a full Linux desktop and plenty of GPIO meant almost certain success. In the past year, though, they’ve run into some issues with their chip supplier and it’s been difficult to find new Pis, which has led to some looking for alternatives to these handy devices. [David] was hoping to build a music streaming server and built it on an old smartphone instead of the ubiquitous single-board computer.
Most smartphones are single-board computers though, and at least the Android devices are fully capable of running Linux just like the Pi. The only problem tends to be getting around the carrier or manufacturer restrictions like a locked bootloader or lack of root access. For [David]’s first try getting this to work, he tried to install Navidrome on a Samsung phone but had difficulties with the lack of memory and had to build the software somewhere else and then load it on the phone. It did work, but the stock operating system kept killing the process for consuming too much memory.
Without root access, [David] decided to try LineageOS, a version of Android which, among other benefits, is typically much more configurable than the stock version of Android that is shipped with smartphones. This allowed him to disable or uninstall anything not needed for his music server to free up enough memory. After some issues with transcoding the actual music files he planned on streaming, his music server was successfully up and running on a phone that would have otherwise been relegated to the junk drawer. The specific steps he took to get this working can be found on his GitHub page as well.
[David] also mentioned looking at PostmarketOS for this job which is certainly a viable option for some, but the Linux distribution for phones is only supported on a few devices. Another viable alternative for a project like this if no Raspberry Pis are available might be any of a number of Pine64 devices that might also be sitting around gathering dust, like the versatile Linux-based Pinephone.
The odds are that if you’ve heard about application-specific integrated circuits (ASICs) at all, it’s in the context of cryptocurrency mining. For some currencies, the only way to efficiently mine them anymore is to build computers so single-purposed they can’t do anything else. But an ASIC is a handy tool to develop for plenty of embedded applications where efficiency is a key design goal. Building integrated circuits isn’t particularly straightforward or open, though, so you’ll need some tools to develop them such as OpenRAM.
Designing the working memory of a purpose-built computing system is a surprisingly complex task which OpenRAM seeks to demystify a bit. Built in Python, it can help a designer handle routing models, power modeling, timing, and plenty of other considerations when building static RAM modules within integrated circuits. Other tools for taking care of this step of IC design are proprietary, so this is one step on the way to a completely open toolchain that anyone can use to start building their own ASIC.
The Raspberry Pi shortage has been a meme in hacker circles for what feels like an eternity now, and the Pi 4 seems to be most affected – though, maybe it’s just its popularity. Nevertheless, if you’re looking for a Pi 4, you would need to look far and wide – and things are way worse if you need the 8 GB version specifically. Or so we thought – [MadEDoctor] shows us that refreshing online store pages isn’t the only way, having successfully upgraded the RAM chip on the Pi 4 from 1 GB to 8 GB with help of a hot air gun.
These chips are BGA, and those might feel intimidating if you’re just starting out with hot air – however, we recommend you watch this video, as [MadEDoctor]’s approach is of the kind that brings BGA replacement to hobbyist level. First off, you get a compatible RAM chip somewhere like Aliexpress – lucky for us, those come equipped with a set of balls from the factory. The default balls are made of lead-free solder, and [MadEDoctor] reballed the RAM chip with leaded solder balls to lower the melting point, but it’s by no means a requirement that you do the same.
In fact, you only need a hot air gun, flux, a soldering iron and some solder wick to perform the replacement – no reballing equipment. Put some kapton or metal tape on the board for heat shielding, get the old chip off with hot air, use an iron with wick to clean the pads, add some flux, align the chip, then use hot air to solder a new chip onto the board. Replacing this chip can get your Pi 4 to the highly-sought-after 8 GB target – as an aside, we’re surprised that there was no configuration needed, as the Pi 4 booted right up and successfully recognized the extra RAM added.
We’d personally recommend preheating for such an upgrade – that said, this sure went without a hitch, and such a RAM swap method doesn’t require any stencils, solder paste or solder ball applications. Drop by the video description for compatible RAM chip part numbers, make sure you have your tacky flux and solder wick in order, and let [MadEDoctor] walk you through upgrading your Pi 4 the hacker way. Is this hack to your liking? Take it up a notch with this laptop soldered-in RAM upgrade journey, or that one RAM upgrade for an old GPU to comply to Apple’s whims.
Now, when you do the math, it seems like there’s no way that [Anders Nielsen] would have been able to fit even a minimal chipset onto a standard solderless breadboard. The 40-pin 6502 alone takes up nearly two-thirds of the connections available; add in equally large but necessary chips like the 6522 interface adapter, ROM and RAM chips, and some support ICs, and one breadboard isn’t going to cut it. Luckily, some frugal engineers at MOS back in the 70s came up with the 6507, a variant on the 6502 in a 28-pin DIP. The other key to this build is the 6532 RAM-I/O-timer chip or RIOT, which puts a tiny amount of RAM and some IO lines on a single 40-pin DIP. Along with a 28-pin ROM, a 14-pin hex inverter, and a little crystal oscillator, the entire chipset just barely fits on a single breadboard.
But what can this minimalist 6502 actually do? As you can see in the video below, anything a 555 timer can do, and maybe a little bit more. That’s not a dig, of course — [Anders] actually calls out his initial blinkenlight application as a little more than a glorified 555, and actually comes up with a marginally more complex application just to prove the point. The interesting part here is dealing with the constraints imposed by the limited resources available on this machine.
We’re looking forward to whatever comes next for this clever build. It’s hard to see how some of the plans [Anders] has for it will still fit on a single breadboard, though — these things tend to spread out as they go.