STM32 and FPGAs In A Tiny Package

Slowly, very slowly, the time when we don’t subject embedded beginners to AVRs and PICs is coming. At a glacial pace, FPGA development platforms are becoming ever more capable and less expensive. [Eric Brombaugh] has been playing around with both ARMs and FPGAs for a while now and decided to combine these two loves into a single board that’s capable of a lot.

This board is fittingly called an STM32F303 + ice5 development board, and does exactly what it says on the tin. There’s an STM32F303 on board providing a 32-bit CPU running at 72 MHz, 48 kB of SRAM, a quarter meg of Flash, and enough peripherals to keep anyone happy. The FPGA side of this board is a Lattice iCE5 with about 3k Look Up Tables (LUTs), and one time programmable non-volatile config memory.

The connections between the ARM and FPGA include a dedicated SPI port, and enough GPIOs to implement full-duplex I2S and a USART. Like all good projects, [Eric] has shared all the files, schematics, and BOMs required to make this board your very own reality, and has provided a few links to the development toolchains. While the FPGA is from Lattice’s ice40 family, it’s not supported by the Open Source Project Icestorm toolchain. Still, it’s a very capable board for ARM and FPGA development.

16 thoughts on “STM32 and FPGAs In A Tiny Package

    1. The ice40 parts are fairly low power. During breadboarding I accidentally left the FPGA power unconnected for a while and it was able to run a small design anyway using current flowing thru the ESD diodes in the SPI signals from the MCU. It’s very design-dependent though, so YMMV.

    1. If you’re planning to use the FPGA for realtime control, please remember that Beaglebone is built on TI CPU which has two 200MHz PRU realtime engines that e.g. MachineKit uses for fast, deterministic control of things like stepper pulse generation, servo loop execution, etc.

  1. Nice idea, I’ve actually been thinking of doing something like this, except with the STM32F7 and iCE40 chip lines. Another alternative to this setup is to swap the STM32 for another, identical FPGA (if cost/power/size constraints allow for it) and run a soft-core on both of the FPGAs. This way, if you have some off-chip storage medium like an SD card, you can have the processor of one FPGA reprogram the other FPGA, and then vice-versa, allowing the chips to upgrade each other and also maintain code compatibility (since you can’t implement a true ARM core on an FPGA without a signed NDA and lots of money). This would be amazing for OTA updates if you have some means of sending bitstreams to the board, like RF or WiFi.

    1. STM32F7 are fun parts, though honestly if I were to go to the trouble of using one of those I’d likely go for a beefier FPGA than the ice40 ultra. Pairing up the F303 with the ice5lp4k seemed like a pretty good match and allowed for a fairly small PCB with lots of potential.

      Interesting idea to have two FPGAs bootstrapping each other. I’ve never been a huge fan of implementing soft MCU cores in an FPGA – seems like a marginal trade-off when hard MCUs are so inexpensive and I’d rather use the FPGA fabric for stuff that I can’t buy off the shelf for pennies…

      1. It’s true that a soft core MCU is really not making good use of the silicon.

        However, there is a strong argument that if you already have an FPGA, you might as well integrate the processor and save a chip + interconnect. Also, it’s really great to be able to memory-map your special hardware directly into the microprocessor’s memory space. And connect up the appropriate interrupts (because having one interrupt for everything and then having to inquire over a comms bus can be aggravating).

        On the flip side, an FPGA will probably wreck your sleep mode current. In this case, an external MCU which does the sleeping and controls the FPGA power supplies would be a good solution.

  2. I see the FPGA part is OTP. Once you’ve programmed it, you need another dev board if you find a bug? Or will there be a way to program it on each powerup via the STM.

    I’ve played with the Silego parts some:
    They’re also OTP, but have the capability of testing configs via their dev kit. Hopefully Latiice supports something similar on this platform..

    1. The built in NVCM (Non-Volatile Configuration Memory) of the FPGA is OTP, but the FPGA is RAM-based and can be loaded with an externally provided bitmap before and after the NVCM is programmed. My board uses the external SPI mode to allow the MCU to configure the FPGA and doesn’t rely on the NVCM.

    1. The ice5lp4k FPGA doesn’t have any SERDES functions that would be necessary for HDMI interfaces so I doubt you’d be able to do much with that. For VGA though the part could drive a simple discrete R2R ladder DAC or external video DAC without difficulty – the clock rates for many VGA modes are well within it’s capability.

  3. While the major FPGA companies have added ARM series A cores to their product line, I’ve yet to hear of anything with the Cortex-M inside. For that lower level, designs like this are required.

    1. Check out the Microsemi SmartFusion and SmartFusion2 parts – they combine an FPGA with an ARM Cortex M3 processor and a full complement of peripherals & memory. Prices start around $30 and there are DIY friendly package options.

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