ARM’s Chinese Venture Goes Sour

We’re used by now to many of the more capable microcontrollers and systems-on-chip that we use having an ARM core at their heart. From its relatively humble beginings in a 1980s British home computer, the RISC processor architecture from Cambridge has transformed itself into the go-to power-sipping yet powerful core for manufacturers far and wide. This has been the result of astute business decisions over decades, with ARM’s transformation into a fabless vendor of cores as IP at its heart. Recent news suggests that perhaps the astuteness has been in short supply of late though, as it’s reported that ARM’s Chinese subsidiary has gone rogue and detatched from the mothership taking the IP with it.

It seems that the CEO of the Chinese company managed to retain legal power when sacked by the parent company over questionable ties with another of his ventures, and has thus been able to declare it independent of its now-former parent. It still has the ARM IP up to the moment of detatchment and claims to be developing its own new products, but it seems likely that it won’t receive any new ARM IP.

What will be the effect of this at our level? Perhaps we have already seen it, as more Chinese chips such as the cheaper STM32 clones are likely to get low-end ARM cores as a result. It seems likely that newer ARM IP will remain for now in more expensive non-Chinese chip families, but in the middle of a semiconductor shortage it’s likely that we wouldn’t notice anyway. Where it will have a lasting effect is in future Chinese joint ventures by non-Chinese chip companies. Seeing ARM’s then-owner Softbank getting their fingers burned in such a way is likely to provide a disincentive to other companies considering a similar course. Whether ARM will manage to resolve the impasse remains to be seen, but it can hardly be a help to the rocky progress of their Nvidia merger.

Arm Researchers Announce The PlasticArm

If the Cortex family of embedded microprocessors aren’t flexible enough for your designs, an article published this week (click here for the PDF version) in the journal Nature might be of interest. We’re not talking flexibility in terms of features, but real, physical flexibility of the microprocessor itself. A research team from Arm Ltd. has developed the PlasticArm, which is a 32-bit processor derived from the Cortex-M0+ family.

They accomplished this by constructing a CPU from metal-oxide thin-film transistors (TFT) on a polyimide substrate, the resultant chip being called a natively flexible microprocessor. While much of the hype focuses on the flexibility aspect, we think the real innovation here is the low cost. The processes used to deposit transistors onto silicon wafers is much more expensive than those on this flexible substrate.

Don’t get too excited just yet, because there were some compromises made along the way. Modern microprocessor silicon dies are measured in the tens of microns, but the PlasticArm total die size is a comparatively whopping 9 mm square. The researchers were appropriately focused on the core CPU, and the auxiliary building blocks such as ROM and RAM seem almost an afterthought. With only 456 bytes of program store and 128 bytes of RAM, only the tiniest of applications are suited to this chip. Other compromises were made, such as no internal registers — they are mapped to the external RAM — and the CPU runs a lot slower than we’re used to, topping out at 29 kHz (note: k not M).

There are certainly some challenges with this new technology, and we won’t be designing with these chips any time soon. But it has the potential to offer benefits in certain niche applications where low-cost and/or flexibility is more important than processor speed and performance.

 

Is 32-bits Really Dead?

While some of us are still clinging onto our favorite 8-bit microprocessors, ARM announced they will be killing off the 32-bit architecture in 2022 and/or 2023. Over on the GaryExplains YouTube channel, [Gary Sims] posted a great review of the current 32- vs 64-bit state-of-affairs — not just for ARM but for Intel and AMD processors as well. And it’s a dismal outlook for you 32-bit fans.

ARM announced last Fall that there would be no more 32-bit support as of 2022, then this March they made a similar announcement but with a 2023 deadline. [Gary] tries to parse these statements, and takes an educated guess at what the disparity means (spoiler alert — he predicts that one more 32-bit core will soon be released).

[Gary] clearly breaks down the 32-bit situation by operating systems such as Linux, Windows, MacOS, Android, and iOS, and how all of these have been transitioning to 64-bits over recent years. He does a thorough job, and concludes that the transition is already well underway. And while Linux and Windows have not completely dropped 32-bit support, the writing is on the wall.

Take note, however, that this discussion regards the Cortex-A family of cores found in smart phones, tablets, computers, and powerful embedded applications like autonomous vehicles. The popular 32-bit Cortex-M family of low-cost / low-power cores that are used in so many embedded system designs will remain 32-bits for the foreseeable future.

After watching [Gary]’s presentation, if you want to learn more, check out the writeup that [Maya Posch] did on the details of the latest ARMv9 ISA a few weeks ago. Also watch this 8-bit vs 32-bit presentation by our Editor-in-Chief [Mike Szczys]. Despite being from five years ago, it is still quite applicable today. What about 16-bit MCUs — the old Intel/AMD embedded 80186 processor, the 8051 follow-ons like the 80C196, 80C251, or 8051XA, the 6502 follow-ons like the 65C816, Zilog’s Z8000, the Renesas M16C, etc. — is anyone using them anymore? If so, or if you’re using a 4-bit MCU these days, let us know in the comments below.

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Raspberry Pi RP2040: Hands-On Experiences From An STM32 Perspective

The release of the Raspberry Pi Foundation’s Raspberry Pi Pico board with RP2040 microcontroller has made big waves these past months in the maker community. Many have demonstrated how especially the two Programmable I/O (PIO) state machine peripherals can be used to create DVI video generators and other digital peripherals.

Alongside this excitement, it raises the question of whether any of this will cause any major upheaval for those of us using STM32, SAM and other Cortex-M based MCUs. Would the RP2040 perhaps be a valid option for some of our projects? With the RP2040 being a dual Cortex-M0+ processor MCU, it seems only fair to put it toe to toe with the offerings from one of the current heavyweights in the 32-bit ARM MCU space: ST Microelectronics.

Did the Raspberry Pi Foundation pipsqueak manage to show ST’s engineers how it’s done, or should the former revisit some of their assumptions? And just how hard is it going to be to port low-level code from STM32 to RP2040? Continue reading “Raspberry Pi RP2040: Hands-On Experiences From An STM32 Perspective”

The ARMv9 ISA, And What It Can Do For You

The number of distinct ARM Instruction Set Architectures (ISA) versions has slowly increased, with Arm adding a new version every few years. The oldest ISA version in common use today is ARMv6, with the ARMv6 ISA (ARM11) found in the original Raspberry Pi SBC and Raspberry Pi Zero (BCM2835). The ARMv6 ISA was introduced in 2002, followed by ARMv7 in 2005 (start of Cortex-A series) and ARMv8 in 2011. The latter was notable for adding 64-bit support.

With ARMv7 being the first of the Cortex cores, and ARMv8 adding 64-bit support in the form of AArch64, what notable features does ARMv9 bring to the table? As announced earlier this year, ARMv9’s focus appears to be on adding a whole host of features that should improve vector processing (vector extensions, or SVE) as well as digital signal processing (DSP) and security, with its Confidential Compute Architecture (CCA).

In addition to this, ARMv9 also includes all of the features that were added with ARMv8.1, v8.2, v8.3 and so on. In essence, this makes an ARMv9-based processor theoretically capable of going toe-to-toe with the best that Intel and AMD have to offer.

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Debug ARM Virtually

With the advent of super powerful desktop computers, many developers make use of some sort of virtual or psuedo-virtual machines (VM). We run Windows in a VM and do kernel development in a VM, too. If you are emulating the same kind of computer you are on then the process is simpler, but it is possible to run, say, ARM code on an x86 (or vice versa) but with possibly slower performance than running natively. QEMU is probably the best-known program that allows a CPU to run code targeting a different CPU, but — by default — it targets desktop, laptop, and server-class machines, not tiny embedded boards. That’s where xPack QEMU Arm comes in. It allows you to run and debug embedded Cortex-M devices in an emulated environment on a host computer.

The tool supports boards like the Maple — which means it should support bluepill, along with popular boards such as the Nucleo, some discovery boards, and several from Olimex. They have plans to support several popular boards from TI, Freescale, and others, but no word on when that will happen. You can see a decidedly simple video example from [EmbeddedCraft] of blinking a virtual LED in the video below, although you might like to mute your audio before playing it.

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Bare-Metal STM32: Please Mind The Interrupt Event

Interruptions aren’t just a staple of our daily lives. They’re also crucial for making computer systems work as well as they do, as they allow for a system to immediately respond to an event. While on desktop computers these interrupts are less prominent than back when we still had to manually set the IRQ for a new piece of hardware using toggle switches on an ISA card, IRQs along with DMA (direct memory access) transfers are still what makes a system appear zippy to a user if used properly.

On microcontroller systems like the STM32, interrupts are even more important, as this is what allows an MCU to respond in hard real-time to an (external) event. Especially in something like an industrial process or in a modern car, there are many events that simply cannot be processed whenever the processor gets around to polling a register. Beyond this, interrupts along with interrupt handlers provide for a convenient way to respond to both external and internal events.

In this article we will take a look at what it takes to set up interrupt handlers on GPIO inputs, using a practical example involving a rotary incremental encoder.

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