Use FPGAs the easy way with Alien Cortex AV


Hackaday reader [Louis] wrote in to call our attention to a neat project over at Kickstarter that he thought would interest his fellow readers. The AlienCortex AV is a pre-built FPGA board from [Bryan Pape] with gobs of ports and a ton of potential. At the heart of the board is an Xilinx PQ208 Spartan 3e 500k FPGA, which can be configured to perform any number of functions. The board sports a healthy dose of analog and digital I/O pins as you would expect, along with PS/2 inputs, VGA outputs, and even a pair of Atari-compatible joystick ports.

The AlienCortex software package allows users to easily load projects into the FPGA, which can run up to four different emulated microcontrollers at once. The software comes with half a dozen pre-configured cores out of the box, with others available for download as they are built. The default set of cores includes everything from a 32-channel logic analyzer, to a quad processor Arduino-sketch compatible machine.

Now, before you cry foul at the fact that he’s emulating Arduinos on a powerful and expensive FPGA, there’s nothing stopping you from creating an army of whatever microcontrollers you happen to prefer instead. We’re guessing that if you can run four Arduinos on this board at once, a good number of PICs could be emulated simultaneously alongside whatever other uC you might need in your next robotics project. A single board incorporating several different microcontrollers at once doesn’t sound half bad to us.

83 thoughts on “Use FPGAs the easy way with Alien Cortex AV

  1. Hi Bryan,

    First, thanks for the offer to review, however I’m pretty sure I’m not qualified. I’ve used the papilio for about 6 months, and electronics is an active hobby, but I rely on people like Jack and yourself to get me over the many hurdles I face in those endeavors. Maybe someone with more skill can step up here.

    Second, I do not really have a preexisting relation with Jack, other than using the papilio and watching his videos (and a few appreciated encouraging words : ). When I first saw Alien Cortex I assumed the project was Jack’s as it seemed so similar (even congratulated him on it) and was about to fund it. I was surprised it wasn’t (and there was no mention of it), but still thought it was a great thing as FPGA’s are a great undertapped DIY tool. I wondered if you had heard of the papilio, then learned that you had worked with Jack. At that point it just seemed weird there wasn’t a mention. Thought maybe there was bad blood or maybe you felt people would be less likely to fund an FPGA kit with a (seemeingly) similar one already out there. Or maybe it was just an oversite… In any case, I didn’t fund it given the uncertainty of what is going on, but still would be happy to if this clears up to everyone aproximate satisfaction : ).

    I’ll take you at your word there are no design infringements, and you will release it OS etc. The thing is, even if it was the exact same board, like with the many Arduino clones, that would still be no problem. Really its just about attribution. Maybe its design, maybe ideas, maybe just inspiration to one up something, but it is important to state.

    The worst case here is Jack gets PO’d and either quits or goes closed source, then you decide people are looking too close and don’t open the designs. Everyone loses. If you pass on a nod, everyone gets a push. It’s the currency that drives OS. Hope steps can be taken and everyone can move forward together.

  2. Hi Robin,

    In reading your comments and the things you’ve had to say, I personally regard you as very level headed, and a constructive voice, and I think it’s good that you’ve spoken out with regard to this issue.

    Indeed people have been making various comparisons between AlienCortex AV and a handful of different boards… Jack’s, the Nexus, etc… and that’s natural given that there are so few of them out there. (Lol… I’m now waiting to hear next that I’d ripped off SparkFun’s Spartan breakout board. since it’s the only one that does actually use the same chip package!! – jk)

    All this to say, I am in full agreement with you with regard to attribution, and here’s the reality… Jack introduced me to this wonderful world of FPGAs. I absolutely do attribute him for that, and have *always* been willing to state that openly.

    The thing is that it’s very hard to give someone a nod when they’re trying to cut your head off. Jack came out on twitter two days after AlienCortex AV launched and made a claim that AlienCortex was a rebranded Papilio One, and that’s what he and everyone else needs to understand is *not* a fair attribution for him to make claim to, and I believe at this point that I’ve shown that to most everyone’s satisfaction. I do thank you for acknowledging that.

    The other thing I might point out is this… the page and the Fabulous Silicon page are at this time primarily intended for promotion and marketing purposes. (Naturally that will change with the Fabulous Silicon site as boards start to ship.) Rarely do you ever see a product’s promotion page for either a commercial *or* open-sourced product that makes as many accolades to those who’s work has also been involved.

    In fact, acknowledgement in most cases falls only to a few snippets of text at the top of a readme or a source-code file or coupled with the GPL license.

    Instead, I personally chose to acknowledge all those who’s work I truly felt played a *signature* role in what makes AlienCortex AV what it is. This includes James Bowman, Ruslan Lepetenok, Oliver Girard, and Stefan Kristiansson. MikeJ from also needs to be added to the list as well, and others who haven’t been named for their work modeling vintage arcade games in HDL.

    All that to say, it’s rare to even make such acknowledgements on a page that was intended only as an introduction for a product like AlienCortex AV, but I chose to do so because I really felt their work contributed *substantially* to what I was able to provide with AlienCortex AV.

    At any rate, thanks again for your voice in this conversation Robin.


  3. Hi Bryan,

    Even if you don’t open source the design just yet, you could send one of your prototypes to Jack can’t you?

    You might know me as the Indian guy who works with Jack, and of course he DID NOT ask me to post here. Knowing Jack for more than two years now, I know he is not that kind of a guy.

    When he showed me the kickstarter link about your project, my immediate reaction was that is a extension of a Papilio board. A single board with different wings put together – something which we encourage with the “Rapid Electronics Development” platform – prototype with Papilio One and wings and finally get them all on a single board. That is what I thought a fully integrated Arcade kit would look like.

    Anyway, I find it amusing that you say this is entirely a ground up design no way connected to Papilio One and yet you also say that “but I specifically designed AlienCortex AV to be all the things I wished the Papilio One could have been”. Are you really refuting the connection or acknowledging the inspiration?

    Granted, you may not have actually used Papilio One’s files, switching to a different package is no big deal. but its not about the clerical job of creating files. Its about the ideas. I am curious to know as to why did you not mention Papilio One in your credits list, considering it is way closer to your projects than the others you have mentioned, and that you did draw a lot from it, consciously or subconsciously.

    In all fairness, do tell us what other board did you have this idea from if it was not Papilio One. I am also curious to know what USB chip is that on the upper left of the board, and what does that 3×2 jumper set just below the DC power connector do. Just a designer’s curiosity, I might be inspired by your board you know.


  4. Hi Girish,

    Yes, I indeed know who you are, and I’ve always heard good things about you.

    Twice the question has come up by this one sentence:

    “but I specifically designed AlienCortex AV to be all the things I wished the Papilio One could have been”.

    This is what I mean by that… some of the most well known companies in the world came into existence because someone left a company (on whatever terms), and had a vision for how they would do things themselves… In fact, most new businesses get started that way. One guy leaves a car company and starts his own to make cars the way he would make them. Another guy leaves a software company to create software the way he thinks it should be done.

    With regard to any apparent perceived similarity to the Papilio Arcade, I should really point out that AlienCortex AV also has striking similarity (in terms of things like joystick ports / etc) to the Minimig project, MikeJ’s board on, and others… and the most common ports (PS/2, VGA) are derived from the Xilinx reference platforms themselves (i.e. the Spartan 3e Starter Kit.) The fact is that all of the “common stuff” on all of our boards in most cases comes from there anyways… that’s why it’s a *reference* design.

    Most FPGA boards are a board with an FPGA chip, breakout headers, power, and all the same ports. You ask what board I had this idea from or that idea from, lol… everyone gets ideas from everywhere, but I can probably actually give you a pretty good rundown of where most every aspect of mine came from, and actually, I enjoy talking about design stuff (since that’s really why we’re all here anyways, no?), and I do hope that it does give others ideas for their own designs… So here goes:

    The 12-bit VGA graphics port on AlienCortex AV is really a pretty common circuit, and was modeled after the circuit published on FPGA Arcade (which was a derivative of the VGA circuit for the Spartan 3e Starter kit reference board):

    This was chosen because nearly all of the arcade game emulators by most of the authors are intended to work with this resistor-ladder based DAC.

    Like Jack and I, MikeJ and the Minimig also uses a couple of 9-pin joystick ports. (The fact is that it’s currently a popular trend right now to model vintage arcade games and computers on FPGAs, so 5 bit Atari style joysticks are the preferred choice by everyone, as that’s what all the open-sourced cores are designed to directly interface with.)

    The audio jack is modeled from the DAC circuit described in Xilinx’s XAPP154. There are two of these circuits to provide left and right stereo audio channels.

    The ADC is a multiplexed version of the ADC circuit described in Xilinx’s XAPP155. Instead of using an LM319 comparator, as described by Xilinx, I used four LM339 comparators to provide 16 analog channels with a single DAC, and reworked the code example provided by Xilinx to wire into Ruslan’s AVR8 core and accommodate multiplexing the ADC comparator inputs. This is actually similar to a true AVR, in that an AVR doesn’t really have 8 or 16 distinct separate ADC channels… it just uses a single mux’d DAC that feeds several channels of comparators in a similar fashion. I also used resistors on the inputs to create a voltage divider in order to have the inputs scale 0-5V. (The one in XAPP155 was intended for a lower voltage.)

    The i/o ports are modeled after the Arduino Mega128/256 form factor (for obvious reasons of shield compatibility). Phillips’ GTL2000-series translators were used to make this happen, and the circuit is loosely based on various reference designs provided in their application notes. It actually came together pretty elegantly because Phillips makes a 22-bit version of the translator and a 10 bit version of the regulator… so 22+22+10 = 54 channels of I/O… exactly the number of I/O pins I needed for the mega form factor. They’re also pretty cheap.

    The FTDI USB chip provides the USB interface for JTAG and serial, and was an obvious choice, as FTDI chips are used on most all hobbyist boards (i.e. Arduinos, Parallax, etc) for USB access. (I’d also used the single port version (the FT232RL) twice before on other projects, making it a “no-brainer” decision to work with the dual port version of the same chip.) The FTDI chips also have cross-platform drivers (which was an important factor), and built in driver support for programming JTAG.

    The serial lines tie directly to the Spartan, the JTAG is buffered by a 74AVC4T245 chip to ensure signal integrity at higher speeds. A jumper is tied to the direction pin of the 74AVC4T245 which effectively allows you to easily switch between the Xilinx JTAG port and the FTDI chip. (Otherwise there’s possible contention.)

    The SPI Flash chip is a Numonyx M25P80, and was chosen because of the fact that it provided plenty of space for a core + 512KB (so enough to boot-load the IDC RAM chip to full capacity), and still have room left over for a few other odds and ends. I also liked the Numonyx chip because it can be programmed directly from the Xilinx Impact software when using the USB Platform Cable, which I thought some developers might appreciate.

    The 133MHz IDT RAM chip was selected to be fast enough (and synchronous) in order to provide access to multiple cores with fanned out timing. (Naturally, this means that the cores have to be running at the same frequency as one another, or a fraction thereof.)

    The power supply uses common off the shelf L1117 regulators, and is subsequently salt and peppered with caps and ferrite beads to get rid of high and low frequency transients. Furthermore, a 500ma self-resetting fuse was implemented across the 5 volt rail coming from the USB. (Lol… which probably kept me from blowing up two or three of the early prototypes before working through the kinks in the design :-) )

    The jumper you asked about determines if the 5V rail is sourcing power from the 2.1mm jack (passing through the 5V regulator first), USB power, or 5V supplied from the Arduino-style VIN connector.

    So that’s it. I’m always happy to elaborate or any area of the design, and really rather enjoy talking about design stuff when I have the time, so I always welcome anyone to ask about it (or criticize it… hopefully constructively :-) .


  5. Alex,

    A good place to start is to get a grasp on the basic fundamentals.

    Before doing anything however, I’d first download Xilinx’s Webpack, since it’s free, and just familiarize yourself with the IDE. For most people, VHDL and Verilog (the two programming languages used for chip design) are a little on the heavy side. I’d suggest that you play around with the schematic editor first… it’s really kinda like using Eagle or Design Spark. You layout modules like you might components and connect things together. (Ok… there’s a little more to it, but you get the idea.)

    Once you start to get a feel for the schematic entry, you can then translate those same concepts into VHDL and Verilog.

    (BTW – Python also has an interesting module called MyHDL, which some say is a little easier to work with. It allows you to program in a “Python-ish” style of HDL which then gets converted to Verilog.)


  6. Hi Bryan, thanks for the detailed explanation. I see that you have put quite some thought into it. As for the apparent/perceived/striking similarities, we all know they are there, but the difference is that they are duly acknowledged. In fact Papilio platform acknowledges its sources of ideas from where ever or who ever they happen to be. I am really surprised that other things you have same from a distance inspire you and yet you draw a blank when it comes to things which you have actually worked on, as if that experience and knowledge counts nothing, and nothing of it went into AlienCortex.

    Really, does it hurt to acknowledge *all* your sources? When you say that there are lot of improvements and changes and even differences from something, there is that reference something which you intentionally made improvements on, or made something different towards those improvements. And course there are some common sense no-brainer things that are part of the design, in fact every electronics design is similar in one or more respects to some other design. But that does not mean everybody reinvents the wheel.

    But the copyrights for every product are different. Car-making is a public domain technology, so is a “type” of software, for better or worse. But there are different copyright issues in effect here. No car designers would fight over using 4-wheels, but they would certainly jump to legal over fuel injection or firing technologies.

    All you require under CC-A-NC is to acknowledge the sources, one of which is the Papilio One, beyond doubt. Besides, as far as I know there is no moratorium period encouraged by open source licenses. Its not about just Papilio One’s license, its about all other sources you are using. If the design comes from a earlier open source design, it must be open sourced and duly acknowledged. You owe it to everybody whom you have drawn ideas from.

    Finally, I am sure Jack would have been proud of you, had you consulted him before releasing the design and/or acknowledging Papilio One as a source. That would have been the right thing to do. Whatever happened between you two, it had nothing to do with work and Jack even I would have been happy to see our work making a contribution to another bigger and more application specific product. That is what we intend with the REDe platform.

  7. Garish… lol… this is pointless to discuss anymore, and really has become a circular discussion that I just really don’t have time for anymore.

    Originally, I was being accused of rebranding the Papilio One. That was obviously not true, even to the casual observer.

    Next I was accused of infringing on the design of the Papilio One. I’ve demonstrated that that’s impossible in ways that I’ve outlined that are indisputable.

    The Creative Commons Attribution license applies to *design reuse*. It’s intended to allow someone to build upon or modify an existing design to suit their purposes, which I think we can all agree at this point is totally not the case here.

    I think you guys are kinda beating a dead horse, and I’ve really gotta spend my time working on things right now that actually matter to my backers and this project.


  8. Bryan, you make it sound as if you would have come up with this board even if you had not seen that something you’ve always wanted to be, never seen the Papilio or worked with Jack, all without the knowhow and features and limitations of the Papilio One design, and that too with zero FPGA experience.

    Yes the Creative Commons license applies here – you taken a lot from Papilio and in turn its predecessors and “built upon” and “modified an existing design” – which is not about simply reusing the files, obviously. It would not have been true if Papilio One and AlienCortex would have been an apple and the other orange, and you would never have seen the apple in the first place.

    You have already conceded that Papilio One was the benchmark which you wanted to excel. Now all you have to do is yo acknowledge it formally, include it in the documentation and that is it. And of course, release the design as open source – before somebody else among your “inspirations” comes up with his OS license agreement.

  9. Hi Girish,

    I’ve acknowledged Jack for introducing me to FPGAs, which I’m happy to do… and in that same vain, I’d also thank Steve Wozniak for the inspiration of the Apple II+, Nolan Bushnell for the inspiration of the Atari and the Topo robot, Steve Ciarcia for writing “How to Build your Own Z80 computer”, and others in a similar regard, and each one has certainly had influence that in some way helped forge the path that ultimately brought me to design of AlienCortex AV.

    The reality is that neither you nor Jack have EVER made a plausible technical argument backing up ANY claim of a derivation… and that’s because you can’t. Plain and simple. It’s original. All of it.

    Even so, you’ve both attempted to slander me, my product, and made every attempt to polarize the community over this issue, and I’m sorry… it’s over.


  10. Setting aside the issue of violating the Creative Commons license for a second. What is clear to casual observers is that you are failing to provide attribution. You admit you worked on the Papilio and you admit you learned FPGA’s from myself and the Papilio website. Those things alone should warrant some kind of mention or attribution. There are many, many more reasons you should be providing attribution but we will not muddy the waters with them here and now.

    Like Robin and others have said, attribution is the currency of Open Source. Providing attribution is the single most important aspect of Open Source, not to do so jeopardizes the entire Open Source ecosystem. What you have done with the Alien Cortex is EXACTLY what I want people to do. I share my work as Open Source because I WANT people to use my work, ideas, and knowledge to get a jump start on making a targeted FPGA design like the Alien Cortex. But, there absolutely has to be attribution and I would hope common sense and courtesy would prevent people from setting themselves up as a direct competitor. Open Source is all about sharing, building on top of, and extending shared ideas. When you don’t provide attribution you are presenting the shared Open Source ideas as your own which makes the wheels fall off of the entire system. When you base your entire product on others Open Source projects, refuse to release your source, and fail to provide attribution you are EXPLOITING Open Source.

    So, Bryan, lets sum up the story so far:
    1) I invited you into my house and, in the spirit of Open Source, shared with you my work, my knowledge, and ideas which included the technical details for the next generation Papilio.
    2) You leave and work in secret to implement the very things I had shared with you for the next generation Papilio. There is strong suspicion that you are even using functional blocks from the Papilio One design.
    3) You set yourself up as a competitor, in your own words, and are using/promoting the Open Source projects that I maintain without providing any attribution.
    4) You actually go out of your way to avoid giving me any attribution. You properly provide attribution for the Sump Logic Analyzer project but neglect to mention that there has not been an update there since 2006. I have been extending and maintaining the Sump code ever since I spoke with Michael Poppitz and he indicated he was too busy to do anything else with the code but would be happy to see work continue on it. You purposely avoid mentioning that. You do the same thing by telling everyone that the AVR8 was designed by Ruslan Lepetenok on Open Cores, but once again it is the same situation. Ruslan is extremely busy and has not made any updates there since 2009, with his permission I have been extending it and I maintain the most current repository. You go out of your way to hide these facts instead of simply giving me the deserved attribution.

    What you are doing is, quite frankly, an Open Source Hardware developer’s worst nightmare and is extremely disruptive to the Open Source ecosystem. At the very least stories like this will make developers afraid to release their work as Open Source.

    Finally, Just saying a thing over and over does not make it true, you say you have demonstrated that your design is not a derivative, you have not. We won’t know that until you release your design files. You also claim to be Open Source, but until you release your design you are not.

  11. Jack,

    We can argue this back and forth until the end of days.

    Here’s my advice to you:

    1. If you truly believe that I’ve infringed upon your designs in any way, then at this point I cab only advise you to do the *professional* thing and contact an attorney. That’s what they’re there for. Nothing is going to be solved by bickering back and forth on Hack-a-Day like this, and I’m sorry that you chose the “mud slinging” approach… which you did from the beginning.

    Frankly, you’re making it appear that anyone who’d ever buy a Papilio One from you is subject to some sort of claim of attribution by you on their design if the EVER use an FPGA in a future design of their own, and that’s absurd.

    2. You’re a talented guy, and so is Girish, and I’m sure that the two of you will continue to move forward with some amazing products with amazing features that people will like as well. Spend your time building up your business and making awesome products, rather than trying to go on a Captain Ahab-style crusade for a whale that doesn’t even exist.


  12. That is excellent but unnecessary advice, I have already done both things you suggest.

    I make it very clear that I welcome and fully support anyone who wants to derive a design from the Papilio. The Open Source license requires attribution, its as simple as that.

  13. I would also point out that I have been very careful to only present facts and to remain dispassionate about this. There are a couple times where I allowed emotion to show but overall a review of my posts shows that I tried to present facts in a dispassionate manner.

    Bryan’s posts were extremely emotional where he accuses me of everything from, “trying to cut his head off” to “mud-slinging”.

    I’m simply trying to get the word out about the Open Source violations taking place here which is what I should be doing.

  14. @Jack Gasset
    You make Open Source sound like some icky infectious disease. As if anything coming into contact with it will be infected and spread it further.
    Please stop that.

    You feel betrayed and think you’re only after justice; but to me you sound petty and vindictive.

    Let Bryan do his own thing and when eventually you have proof (not “suspicions” or “obvious facts” or “clearly inspired” or other vague terms) of Open Source violations, then Bryan will have egg on his face.

    So let it rest before you sound even more like those indignant software patent trolls.

  15. Wow. I just found this thread, right after seeing Jack Gassett’s KickStarter project for the “Papilio FPGA Shield”.

    Bryan thinks an FPGA with Arduino-compatible I/O is a great idea, and creates the AlienCortex AV. So does Jack, and he creates a new product, the Papilio FPGA Shield.

    Bryan thinks integrating capabilities functionality equivalent to the Papilio Arcade Pack onto a single board is a great idea. So does Jack, and he creates the Overshield. But as a separate board, not integrated on the Papilio FPGA Shield.

    Bryan thinks the hassle of prepping and loading pre-configured cores should be simplified, so he creates the Core-Pack. Jack agrees, and he creates and promotes the “Papilio Community Core” concept.

    Bryan thinks KickStarter is a great way to get an Arduino-compatible FPGA board to market. So does Jack, despite having an existing business that uses a different approach.

    Obviously, Jack agrees that Bryan’s ideas, designs, and marketing approach are stellar, and well worth emulating!

    The main difference I see is that Bryan had working alpha hardware before creating his KickStarter project, and Jack is pushing a concept (lots of bare boards, but no working hardware demonstrated in the video).

    Could that be because Jack was in a rush, and wanted to get his own competing project out there before Bryan’s KickStarter window closed? It does make me wonder just how spiteful Jack is being with his public comments and actions.

    Actions speak louder than words.

    Still, Jack’s project does indeed look to be a very nice design, and I wish him success with it!

    Perhaps the whole is greater than the sum of the parts: Can you imagine stacking a Papilio FPGA Shield on top of an AlienCortex AV? No limits!

  16. Some times I wonder why people call the Hardware open source.
    Looking at the above discussion is more like patent infringement lawsuits are soon coming on their way.
    Well we need to wait till the so called “Open source” AlienCortex makes its way to the developers and they comment on whats true and whats not.
    This also means earning lots of cash out of the product without giving the Open Source community any benefit at all.
    But even if we keep it all apart, we see a noble Open source project idea of Papilio gets less attention.

    Lets hope that would not be the fate of any Open Source project.

    Best of Luck!

  17. If Bryan’s work wasn’t done in a “clean room” environment, which it obviously wasn’t, then it’s obvious that at the very least attribution is required. The arguments to the contrary are demonstrative of inherent dishonesty. What is so hard about attributing P1? Spite is a very ugly thing. Booo!

  18. MKM,

    Patent infringement applies to inventions, which is why any talks of “lawyering up” is just talk. :-)


    Attribution is something I’ve been more that happy to give to those who’s work has been used in this design (namely the cores).

    And with regard to hardware, let me ask you… would you accuse me, or anyone else of ripping off the Arduino for using the same AVR chip, but in an entirely different design? Or maybe you’d say that Apple is ripping off Dell or Gateway for using the same Intel processor.

    I’ve designed a board that uses a Spartan 3e chip. Anyone can buy the same chip from a variety of sources, and build a board with it like I’ve done. Why should you or anyone else *automatically* make the assumption that AlienCortex was somehow derived from the Papilio just because we use the same chip? (Not to mention that they’re not even the same package or pin-count.)

    Isn’t that skipping a couple of steps, like explaining how, or why, or what basis you might have for your opinions? Once again (I feel like a broken record… lol), no one ever actually specifies any technical reasons.

    lol… I suppose that it’s just easier for some to just sit back and casually make inflammatory or accusatory remarks, rather than to do anything that might require any real level of thoughtful analysis.

    But since you’re willing to be so outspoken, let me ask you… exactly *what* do you think I should attribute to Jack or to the Papilio One? Seriously… what part of the *months* of late night’s and hard work that went into the AlienCortex AV design do you think he deserves any credit for?

    I will say however that I am in full agreement with you in one respect… Spite is indeed a very ugly thing, which is really at the heart of this whole matter. I’ve spent the last four weeks having to react to an onslaught of spiteful remarks, accusations, and in some cases, downright lies… both here and on Twitter, as well as his websites. If this were really about attribution, then he wouldn’t be putting this kind of energy into it all. All of this is because he’s emotionally charged about a past associate of his introducing a potentially competitive product in the marketplace, and he’s taking it personally.


  19. Let me interject my thoughts on this argument.

    The crux of this argument stems from this

    1) is Bryan’s work an adaptation of Jack’s work.
    2) is Bryan’s work a embodiment of future ideas of Jack’s designs.

    The CC license the Jack uses does allow modifications. It also allows the modified work to be used in a collection. That can be used with other works to form a new work. All this is also under non commercial agreement.

    Now the way I see it:

    1) Hardware wise one has to consider is the core of the new work based on Jack’s work or on common designs not protected?

    2) is there any copyright/protection issues with the VHDL source code or other software that is used with the new work.

    3) as for being a future work of Jack’s ideas, was there ever a Non Disclosure Agreement (NDA) between Jack and Bryan. If no NDA then any ideas that Bryan got from working with Jack is not protected ideas. While in employment Bryan should have signed a NDA to protect Jack’s future ideas from being acted on by an employee leaving.

    This whole argument solely rests on whether the core work centered around the FPGA used is a derivative work and used in a collection to form a new work. If not then there is no violation. If there was no NDA, then the ideas that Bryan may have had during his employment with Jack can be acted on without incurring penalties from patent or copyright infringements.

    this is my opinion only for having worked in the electronics industry for 23 yrs and having to deal with copyright and patent infringements in developing consumer electronics.

    Personally I see this as a bickering between employer and former employee as to whether future ideas were alleged stolen and whether the core of the new work is an adaption of another work not given recognition and potentially used for commercial gain. That is where the potential rub may exist.

  20. Well after thinking it through I believe the ideas are all generic and no attribution is necessary between the Alien Cortex AV and the Papilio One with it’s wings. The hardware is not the same.

    The Papilio with is it’s wings is a simplistic FPGA breakout implementation. Electronic legos if you will. In the same category as breadboarding.

    The Alien Cortex AV is a platform. It has integrated functionality. Functionality that can be criticized but still it gives people a high level to start from to learn FPGA’s. It’s focus is on soft processors first and FPGA’s second. It has software specifically designed to help program and configure it at the high level it’s ment to be used.

    Bryan may have been inspired by the possibilities of the Papilio One but he did not replicate it. To be inspired by the Papilio One is to be inspired by FPGA’s in general. In my evaluation the ideas behind the design goals of the projects are different. They do not compete.

    The Alien Cortex AV is like an Arduino or Basic Stamp while the Papilio One is like an Atmel AVR breakout board. Getting into FPGA’s and microcontrollers I would start with the Alien Cortex but building projects I would move onto the Palilio and then start making my own boards.

    Bryan should credit the Papilio no more than he should credit the breadboard he learned electronics on.

  21. Question for Bryan. Do you have a web site or forum up yet to monitor the status of your product? I’m eager to monitor how well this product progresses. If everything goes well I’ll definitely pony up for the next release if it’s a more powerful FPGA. I kind of wonder if you couldn’t design the next board so that it supports both the cheaper and more expensive FPGA’s.

  22. Hi BlueCoder,

    Thanks indeed for your previous comments. :-)

    First, I would indeed like to give attribution to my RadioShack breadboard, catalog #276-174 for all the endless hours of fun and inspiration… lol. (just kidding) :-)

    With regard to your questions…

    Indeed a forum is in the works! :-) It’s just been a little less of a priority at the moment, as my main focus has been to make sure that the boards get out, and that everything is rock solid with Core Pack and the compilers across all platforms. It will be up soon though, and definitely well before shipping the boards from the Kickstarter run. There will actually be two forums:

    The first will be at the Fabulous Silicon site (for AlienCortex AV, Fabulous Silicon shields, and Core Pack support):

    And the second will be at MikroElektronika’s site (for general support with MikroElektronika’s AlienCortex-series of compilers):

    The other main area of focus drawing most of my attention at the moment has been toward the development of a couple of very cool shields that I’m really very excited about that will be announced in the coming couple of weeks. Both of them (in very different ways) will dramatically increase the capability and functionality of AlienCortex AV. (One of them will also work quite well with the Arduino Mega128/256.)

    With regard to bigger and faster chips, those things are certainly on the horizon at some point in the future, but really are not in the immediate plans, as current development for AlienCortex AV is what’s been at the forefront.

    To that effect, one thing I’ll say is that in general, most of my approach to product development is usually not driven so much by chip specs (i.e. more logic gates, more ram, more “more”… etc… :-) ) I think that can sometimes be a trap that’s pretty easy to fall into (from a development standpoint, at least), and tends to lead into creating products or platforms with really powerful chips on a board, but without the tools or followup development to really put it to good use in a way that really justifies the power of the chip itself.

    I usually tend to take on more of a “user-centric” approach to development, which is to start from the “end” by posing the question: “What do you want to do?”, and then work backwards from there and figure out what’s necessary in a design to make it happen.

    That’s really at the crux of AlienCortex AV as a platform… which stemmed from asking that question of myself and others… and the answer was: video games, robotics, and synthesizers. (I also wanted a platform that would also just be lots of fun and be easy to teach with.)

    So with that in mind, yeah… I’ve certainly been noodling around with ideas about what will be involved in doing a 2 million gate version of AlienCortex, or something like that… but before doing so, I will always first try to define my design objectives by first asking the question… “What do you want to do with it?” (Which… in this context… I’m really asking you that too :-) )

    On a little bit more technical level though, I’ll give you some insight as to the direction things are headed in the coming months with AlienCortex AV…

    With some of the cores that will be coming online, you’ll find that the use of a *synchronous* SRAM (vs conventional asynchronous SRAM) will soon reveal itself as one of the more key aspects of the AlienCortex design in terms of what it was really intended for…

    vtl mentioned in an early post that the real virtue of an FPGA is “superior speed and pipelining operations”. He’s absolutely right.

    Let me expand on that so that it might make more sense for those who are reading who might be new to FPGAs… (Just bear in mind that it is a bit of an involved topic, and by no means is it critical for anyone to fully understand all the following concepts… especially if you’re just getting started…).

    Suppose that you’re designing a core for a digital music synthesizer (just as an example) with multiple oscillators (which is functionally, more or less, just an application-specific DSP). The conventional approach might be to create a single oscillator in VHDL or Verilog, and duplicate it several times in code to achieve a certain number of notes of polyphony.

    This is fine (and really the most common approach for most cores), but you have to increase the number of logic gates and registers used in the design by a factor of the number of notes of polyphony. Unfortunately, this approach can be pretty redundant and wasteful. Let me explain why…

    The logic gates used to create a *single* instance of an oscillator can (and ideally should) be used to serve as *multiple* oscillators by running the logic gates many times faster (via pipelining).

    Logic gates in an optimized FPGA design can usually perform very very fast (i.e. hundreds of MHz)… Things slow down when you have to deal with registers… primarily with regard to storing or loading values at various points in the chain (or pipeline). The amount of time that it takes to load or store data to and from registers is generally much longer (and is really the bottleneck) compared to the processing speed of the logic gates in between the registers that merely “process” and operate on those values and data in the design.

    Pipelining is a technique that allows you to “recycle” the logic gates between multiple instances of registers, and can be done so long as those aspects of the design that all perform the same basic functions… i.e. one synth oscillator is functionally the same as another in our imaginary synth). The timing that determines when any given set of registers is “processed” on a single clock cycle of a single instance is simply performed “out of phase” with the other “register sets”. (This, once again, requires that the logic be run at a clock speed that is a multiple of a single instance.)

    What I’m getting at is that many FPGA core designs are somewhat inefficient in many ways, because (like most aspects of computing in general) they have lots of unnecessary redundancy. By increasing the speed of various critical paths in the chain, (including access to outboard ram), along with pipelining techniques, you can actually get a 500000 gate chip design to often times exceed the capabilities of what you’d expect to be able to achieve from a much larger or more expensive chip using more conventional design techniques.

    With efficiently designed and optimized cores you can actually get, for example, *several* synth oscillators, all with the same audio quality and features, out of a single instance of logic gates being “recycled” with pipelining, and only a marginally higher gate count.

    I should emphasize again that pipelining *does* however require the use of a lot more FPGA registers, but that’s rarely a problem, as a conventional non-pipelined FPGA design that might consume nearly 100% of the logic gates of the chip often will only use about 20%-30% of the available registers.

    All this to say… (in yet another one of my typical overly verbose and long-winded thread postings… lol) The immediate future of AlienCortex AV will initially be geared toward the ongoing development of a series of cores (and shields) that really push the limits of AlienCortex AV’s current chip in ways that will be leveraging pipelining techniques similar to what I’ve described.

    This will allow for more synth oscillators, more signal processing, and more parallel soft-processor cores for the existing platform for at least some time to come. (Personally, I kinda dig the prospect of being able to push a 500K Spartan 3e to the bleeding edge of what it’s capable of… which is really a lot :-) )

    By the way… it is important that I mention at this point, (especially where the advanced pipelining and core optimization techniques are concerned), that there are indeed others (especially one ASIC designer in particular, who’s been consulted during this coarse of this project since the beginning) who are actively involved in the continued development of AlienCortex AV and it’s cores, but have (at their own discretion) chosen to remain quietly anonymous at this time until the whole “drama storm” surrounding the product’s launch moves along. :-)

    I only wanted to say this much, as I do think they deserve their fair recognition (even if I’m not allowed to accredit them by name at this point.)

    There are some really neat things that will be coming to this platform, and that’s due in large part to the involvement of some very talented people who’s work will be made evident fairly soon.

    On one other note, I wanted to mention (for anyone interested) that the order I’ve placed for the first production run of AlienCortex AV boards is in excess of the quantity needed to fill the rewards for Kickstarter, as I’ve had a lot of emails from those who are also wanting to get a board, but missed the funding deadline.

    Those wanting an AlienCortex AV from the first production run who might have missed out on the Kickstarter funding cycle should email me if you’d like to be added to the waiting list at:

    Please note that there are will only a limited number of these excess boards from this first production run, and that they will only be tested and shipped only after all of the boards from the Kickstarter run have been shipped to project backers (so they’ll probably go out about 2 weeks after… around the beginning of September).

    Also, be aware that this is just a *waiting list*, as (I’m not taking any “money down” or payment until the Kickstarter orders are shipped out).

    Those added to the list will get an email after the Kickstarter rewards have been shipped, and the “waiting list” orders will be prioritized and filled by the order in which people were added to the list.

    Anyone should feel free to ask any other questions, and I’ll certainly try to also be a little shorter/more concise with my responses in the future :-) … I just had a few updates and some information that I wanted to share with everyone right now that also happened to fit within the context of BlueCoder’s questions. (I hope you don’t mind, BlueCoder :-) )

    Bryan Pape

  23. This kind of circuit re-use via time-domain multiplexing is inspiring new approaches to FPGA design, such as those from Tabula (, Google for industry reactions).

    Tabula can reprogram the entire FPGA every minor cycle (the programming fabric has multi-bit depth and is very fast). If your design needs 100 MHz performance, and the Tabula FPGA can run at 500 MHz, you get to re-use the entire FPGA 5 times at 100 MHz (the only exception being I/O, but you can mux that too if you want). So if your design needs 1M gates, a 200K gate Tabula device may suffice.

    There are other companies pursuing similar time-domain “3D FPGA” solutions -Tabula was just the one I recalled first. The main advantage is that very few FPGA applications ever use the full speed of a device, so the vast majority of device bandwidth is wasted.

    In many current FPGAs, multi-port registers and RAM are also implemented in the time domain, removing the need for hardware arbiters.

    I look forward to learning more about this approach from Bryan’s Core-Pack examples!

  24. So these discussion are interesting, there seems to be more ‘open source’ hardware companies who are making a living of those designs, whereas the majority of open source software is generally done by people with day jobs.

    I think these sorts of falling outs are going to become more common as more businesses pop up and people are relying on them for income vs for fun.

  25. I have some instrument projects where I’d like to be able to have portable built-in sound generation/synthesis in order to avoid having to start your computer, music software and connect your hardware (with MIDI/OSC) before you can start playing. Doing a hardware synth seems like an interesting challenge but these days it seems very hard to justify going with hardware over software solution in terms of cost and flexibility.

    I’m not experienced in FPGAs and how much you can squeeze out of them so what I’d like to ask Bryan or anyone else who feel informed if a FPGA based solution like the Alien Cortex AV could offer any advantages in a polyphonic synth compared to for example the similarly priced beagle/pandaboard coupled with a custom linux and music software configuration. The complexity of running a OS and choosing/configuring the software is the biggest downside I can think of why not to go all software.

  26. Hi bear,

    There are definitely advantages and disadvantages to both. In this case, most of the considerations would be very similar to how you might decide between a VSTi versus a dedicated hardware synth.

    Beagleboard Advantages:

    1. Flexibility of having an operating system.

    2. Variety… there are several VSTi’s and software synthesizers on the market… Although one important thing is that I’d look into whether or not a VSTi would work with the Beagleboard. I know that you can run VSTi’s under WINE on an Intel or AMD based Linux box (which is how the Muse Receptors work). I’m not so sure though that you can do the same on the Beagleboard since it’s based on an ARM architecture. I’d think that you’d have to recompile it from the source-code for ARM (unless there’s a cross-compiler? You might be limited to only open-source non-VSTi soft-synths.

    3. Onboard DSP via the Beagleboard’s onboard TI effects processor. (A very cool feature of the Beagleboard).


    1. Operating system overhead (This can lead to unpredictability … especially for time-dependant tasks, like making sure that it fires off all the notes you play, and when you play them.) The Beagleboard CPU is 1 GHz… It’s just a matter of how it might prioritize OS tasks against playing synth notes, etc.

    2. Linear/Sequential processing.

    3. Latency. (Really due to voice setup and processing in systems with linear/sequential processing)

    AlienCortex AV Advantages:

    1. No operating system overhead/instability.

    2. No latency (other than processing the MIDI data itself).

    3. Several open-source FPGA synths are available to modify and tweak by some really talented HDL coders (I’ll be porting others to AlienCortex AV as time permits).

    4. AVR-style programming (with the Alien Song core, at least)

    5. Latency-free true parallel processing.


    1. Lack of the convenience of an operating system.

    2. Currently, there are fewer FPGA cores available for AlienCortex AV than there are soft-synths running under Linux.

    Those are what I see as being the biggest differences (being as unbiased as I can be :-) ).

    And also keep in mind that I’ve never actually seen a Beagleboard in person (I’m just going off of what I know about the architecture).

    One other thing that I’m personally looking forward to with regard to AlienCortex is that FPGA synthesis is a bit of an undiscovered country in that people are only just now starting to exploit the potential in this area.

    Here are a couple of good links for you to explore:

    If you don’t mind my asking, what kind of controller are you using? (I’ve really been wanting to build a laserharp for AlienCortex when I get the time :-)


  27. Hi Alex,

    The hardware is capable of 4096 colors/12 bit VGA graphics. The resolution is dependent on whatever core is generating the video. The number of colors usually also somewhat dependent on the core being used as well.

    In the case of the Xtreme-G core that provides arcade-style graphics and sound based on the Gameduino project, you can have a screen resolution up to 400×400, and it will display up to 512 colors.


  28. These are projects I’m interested in prototyping; not sure what is possible.

    USB analyzer.

    Combine/multiplex USB HID devices from a hub into virtual HID devices.

    A monitor signal decoder to create my own digital Ethernet KVM on the cheap.

    Guitar computer/synth. Mount a FPGA+FPAA chip in a guitar. Separate input from every string. Stepper motors to autotune/retune each string. Very quick synth/midi for every string. Output to analog or Ethernet.

    I would love to play with neural networks. So bigger chips and or a fast backbone bus to connect multiple devices would be nice.

    On the extreme end I would love to play around with processor design and microkernels.

    What really attracts me to FPGA is the ability to emulate multiple chips on one piece of silicon. Also since I can emulate different processors/DSP’s I can pick and choose the right chips for what I’m trying to do without hopefully needing a sample of everything on hand.

  29. Thanks for responding Bryan!

    Seems like you can get ok latency with beagleboard:

    And vst:s might be nice but you might also be able to use the likes of PureData and CSound.

    One of the options I’ve considered is using vintage chips (yamaha FM ones primarily) controlled by a microcontroller but on the other hand you could just emulate a bunch of them with an FPGA or powerful enough CPU.

    Have you seen this project?

    I’m playing around with the wicki-hayden keyboard layout, currently I have a crude but playable prototype and a head full of more advanced designs!

  30. BlueCoder:

    We definitely share a lot of fringe interests.

    I think you’d be able to get a lot of mileage out of a 500K Spartan chip with regard to the things you’ve mentioned.

    I have to admit that I had absolutely no idea what an FPAA was until I read your post. Who actively makes those? Anyone? After doing a little research, I’m particularly interested in finding out if such a chip could potentially offer a viable solution for true analog resonant filters for a polyphonic synth… or… would it even be possible to put an entire analog synth on one chip… and maybe even a solution to be able to overdrive the output a little if it was also used to sum the outs.

    Lol… unfortunately, most of my questions at the moment are probably doing little more than revealing how ignorant I am about FPAAs, as well as how little time I’ve had to Google my own answers, but I’m very intrigued, and plan to look in FPAAs a bit more when I have some time.

    Another thing… in reference to your “circuit-bending” guitar project… Have you ever seen the Yamaha G10? I’m sure that the world of MIDI guitars has advanced since I read the article (several years ago) that comes to mind when the G10 was originally being reviewed by Keyboard Magazine. If I remember correctly (which I can’t quite guarantee, but alas :-) ), it seems that I remember reading that a string needed make two successive passes across the pickup in order for the guitar-to-MIDI converter to be able to accurately determine the note being played.

    Because of this, Yamaha did something interesting. They ended up putting high-E strings for all the strings of the G10, and then transposed them as needed in the guitar-to-MIDI converter. The idea was that the latency (such nasty word) is *doubled* for each octave that you go down in pitch, since the frequency is halved by the octave.

    Tracking on a conventional Guitar-to-Midi converter is therefore much tighter, and has much better timing on the high notes, but sluggish and delayed on the low notes.

    Getting back to the G10… by using the high-E strings, Yamaha dramatically reduced the latency. Of course, If you were to actually listen to the strings themselves while you were playing, it would pretty much sound like crap (for obvious reasons), but (in theory) the G10 provided a much more “MIDI” friendly approach… especially with regard to the timing and tracking… which might be a useful technique to consider in your own design (if you haven’t considered already, that is).

    And with regard to neural networks… I’ve always been absolutely fascinated by the theories, but never quite had the time or discipline (or the hardcore math skills, to be honest… lol) to get beyond the conceptual aspects of it all. (Lot’s of statistical analysis, if I recall.)

    I do think that FPGAs hold a lot of promise in this area do the fact that they are great at processing in parallel. For those that know how to apply neural networking algorithms the right way, I have little doubt that FPGAs are ideal in many ways for things like image processing for visual recognition.

    Instead of using a high-speed CPU or DSP to rapidly run the same algorithm multiple times linearly to process a single frame of video, an FPGA can theoretically handle similar processing much more efficiently by running many many instances of the same algorithm in parallel. Keep in mind that this is all over-simplified, and just theory, but I’d be really interested in keeping tabs as to your approach.

    One other thing that just came to mind, which you might already be aware of with regard to this topic… Mathworks makes a product called “FPGA Design”:

    I’ve never used it, but it advertises the following:

    “Simulink HDL Coder™ [part of FPGA Design?] lets you automatically generate HDL code for rapid implementation of algorithms in FPGAs.”


    That Beagleboard demo you referenced looks pretty cool. (Shhh… I might have to buy a Beagleboard for my next toy… :-) )

    A couple of thoughts… keep in mind that the Beagleboard YouTube demo is a monophonic synth, so latency probably won’t be very high until you have to start processing multiple notes simulatneously. I imagine (taking the Beagleboard’s specs into account) that the Beagleboard is probably capable of polyphonic synthesis to an extent, but it will likely be prone to latency after a few notes. It’s just a matter of how many.

    Conversely, it’s pretty easy to get latency-free polyphonic synthesis on an FPGA, since it’s generally parallel.

    I’ve heard of CSound… it’s been around for a quite a while I think, no? But I haven’t ever really taken the time to learn how to use it in a meaningful way.

    I just looked up Pure Data… Jeez… lol… How come I haven’t heard of that before? That looks sweet. I’m going to have to play with that when I get a chance. (You better not show me any more cool stuff, bear, or I’m not going to have time to develop for AlienCortex!!… jk :-) )

    Regarding FM synthesis, the first synth I ever owned, and learned to program was a Yamaha DX7. Lol… I personally think that if you can program an FM synthesizer relatively well, then you can program just about anything.

    Since then, however, I’ve become more of an analog-synth guy, but I recently bought a DX7IIFD (as I’d sold my first DX7 years ago) and I’ve started to play around with FM synthesis again. (I actually really like FM for the very distinctive dicey digital sounds that it can produce, but FM string sounds and that dreadful “Doogie Houser” DX7 electric piano should be banished for eternity, in my humble opinion… lol)

    Have you checked out Scott Gravenhorst’s polyphonic FPGA FM synth? (Scott’s been a bit of a pioneer with FPGA synths, who’s work I’ve come to respect.)×4

    I’ve played with a couple of his other synths, but haven’t had the time to try his FM synth yet on AlienCortex. Just listening to the audio demos, it sounds interesting.

    This implementation is 2 operators per voice, but he says that he’s got an 8 operator version in the works.

    Lastly, I’d never seen that YouTube video, although I have heard before that the SID chip was implemented on an FPGA, and I’m hoping to have some time to play around with it sometime soon.

    The wicki-hayden layout looks very interesting… although I imagine that my brain would probably fight it if I tried to make myself learn it… only because I’ve been playing on traditional linearly arranged keyboards for so long. I’m curious about your experience with it though.

    Too many interesting topics… and never enough time… argh… :-)

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