Our new part of the day is the ColorLight 5A-75B, a board that’s meant to drive eight of those ubiquitous high-density color LED panels over gigabit Ethernet. If you were building a commercial LED wall, you’d screw a bunch of the LED panels together, daisy-chain a bunch of these boards to drive them, supply power, and you’d be done. Because of that high-volume application, these boards are inexpensive, around $15 each, and available as quickly as you can get stuff shipped from China.
But we’re not here to talk commercial applications. Managing fast Ethernet and pushing so many pixels in real time is a task best handled by an FPGA, and [Tom Verbeure] noticed that these things were essentially amazing FPGA development boards and started hacking on them. [q3k] put it up on GitHub, and you can follow along with the
chubby75 reverse engineering project to dig into their secrets.
While the first generations of these boards used the old-standby Spartan 6, things got interesting for fans of open FPGA tools when newer versions were found using the Lattice ECP5-25 chips, the little brother of the stonking big chip [Sprite_TM] used on the 2019 Hackaday Supercon badge. If you want to grab one you’re looking for ColorLight boards marked with revision 6 or 7 as of this writing.
What does this mean? For the price of a gourmet hamburger, you get an FPGA that’s big enough to run a RISC-V softcore, two 166 MHz, 2 MB SDRAMS, flash for the FPGA bitstream, a bazillion digital outputs on 5 V level shifters, and two gigabit Ethernet ports. The JTAG port is broken out in 0.1″ headers, and it works with OpenOCD, which is ridiculously convenient. How’s that for a well-stocked budget FPGA dev board that’s served by a completely open toolchain?
Hackers at Work
The reverse engineering work on the ECP5 variants is still in progress, but there are some really heavy hitters in the open FPGA scene playing around with this board right now, and progress is being made rapidly.
Last week, to map out the new ECP5 variants’ pinouts, [Mike Walters] used a particularly sweet hack that he learned from [Claude Schwarz] that plays to the strengths of an FPGA: bit-bang serial UART with the pin number on all of the pins simultaneously. Each pin on the output headers then told him which pin on the FPGA it was attached to. Great idea!
[Florent] of Enjoy Digital got a picoRV core up and running with Ethernet UART just yesterday.
What would you do with one of these beasts? Obviously, drive many, many LEDs. (Here are two great references for Hub75 LEDs: one for Arduino, and one for Raspberry Pi. [Nick Poole] over at Sparkfun also has a nice deep-dive.) But there are other uses for high-bandwidth, real-time outputs. Control an arbitrary number of servo motors over Ethernet? Or heck, steppers! Myself, I’m not so much interested in the Ethernet as the memory and pinout, but you have to admit that an Ethernet bitstream bootloader would be an awesome hack.
While this is a reverse engineering effort — prying open a closed design — we’ve also seen great open-source hacker FPGA boards flourishing in the last few years. From the early Dipsy and Upduino projects, through TinyFPGA, BlackIce, and the iCEBreaker, to the super-recent Pergola and [Greg Davill]’s OrangeCrab and ButterStick, you’re not hurting for choice in dev boards if you don’t want to hang out on the bleeding edge with a Chinese LED driver.
If you are just starting out with FPGAs, you can support these awesome developers and it will more than pay you back in time spent: they’re all open, documented, and tested. I’m sure I’ve missed more than a few awesome boards as well — these are just the ones that I’ve had in my own two hands. (Post your favorites in the comments!)
But if twin Ethernets, a bunch of RAM, and too many 5 V outputs are the peripherals you need for your FPGA project, or if you just want to lend a hand to the development effort, the ColorLight 5A-75B might just be worth the hack. You certainly can’t beat the price.
51 thoughts on “New Part Day: LED Driver Is FPGA Dev Board In Disguise”
Price going up in ….
I have no idea how much a gourmet hamburger is either. can we please use references that people who build things out of trash can understand?!
8 $2 dollar simple McDonalds Cheese burgers. Except the burger doesn’t contain plastic.
And the burger has waaay less RAM. And you have to bring your own GigE magnetics, likely.
I’ve tried nothing and I’m all out of ideas! (i.e. I didn’t find this on eBay – where can I get one?)
Could HaD get a referal system going (or would it be a slipperly slope)?
Cause often in articles like this I want to buy the featured hardware (as it’s buy and forget price) but can’t be bothered looking for it.
@Alex Rossie L if you can’t google the board name in the fist sentence,I have no hope for you.
Even places like amazon is selling it (at overly inflated price)
https://www.aliexpress.com/item/32281130824.html for instance, but there are tons sold by other sellers.
If it came from China, there might be plastics, used engine oil and lead.
Known to cause the State of California…
Miles, feet, inches, horsepower, Fahrenheit, duckpower and currency in hamburgers.
It’s an American thing.
I’ve been using SI units for almost 50 years now.
Also these boards are available in many variations.
Some look less expensive.
I would much prefer variants with Alters FPGA.
Don’t forget sports as units. e.g. when they use their ‘football’ fields for area measuring area.
Aren’t FIFA soccer fields and NFL football fields about the same size?
What about “Olympic sized” swimming pools, aren’t they the same length?
I bought a small FPGA board with a larger SDRAM and reasonably sized Xilinx (20k LUT?) Spartan6 for $20. It came with schematics and JTAG and I/O broken out to dual row headers.
The advantage of this board is the 5v output level translators.
It would be even better if bidirectional level translators could be used.
FPGA board with tons of memory and 2x GigE: $15
Not having to use proprietary toolchain: Priceless.
Why is a nonproprietary toolchain so important to you? Just asking.
I’ve used both the (free) Xilinx and Altera toolchains and nothing else because there were no alternatives when I started with FPGA.
Admittedly the Xilunx ISE was a right pain even to get it working. However it’s a powerful package after the steep learning curve.
Altera, however, is much easier to use out of the box. But after a while you start to miss some of the features of the Xilinx package.
They are still going to be pumped out enbulk because those LED panels are everywhere and you need to daisy chain a ton of them.
@Rog Fanther: that’s the beauty of hacking current mass-market gear. We won’t even make a blip on their radar.
But I would pick one up soon if you’re interested. Given that they’ve already revised down from Spartan 6 to Lattice, they’re clearly price-conscious on the FPGA. There are new Chinese FPGAs being put out now that might be even cheaper, without the benefit of an open-source toolchain.
(Wild-ass speculation alert.)
Any one have recommendation for quick clean risc-v linux distro?
To setup a pfSense or Pi-Hole style implementation? No management platform, no binaries, no ASM exploits since you could find/replace one letter in the ASM function definition of the Risc-v have it work perfectly and have your compiler tweaked for that one mutant you’ve made.
Memory/Storage is the painful piece but maybe 2 USB/SD adapters could be doable. Rand/Entropy fed from external pin-out and a simple 9600 for a terminal connect.
This beats the Pine Board (speed not withstanding).
Has anyone added an Additional Ethernet Port and/or soldered up an FTDI USB/SD chip to a PanoLogic yet?
Have a great day all.
Good luck on getting linux kernel and the IP stack in 2MB of memory space. Might be okay with RTOS and lighter IP stacks for embedded stuff, BUT they might not be secured.
it is 4MB (1Mx32)? but still for linux it is quite low.
Even for uClinux fork (back before it was mainstreamed), it would barely enough to run command line stuff. 2.x might be a stretch and any of the more modern kernels would be too bloated.
It get worse as the 4MB is for code, data and filesystem as there no external FLASH.
I’d try to use Zephyr instead.
Secured? Just make sure there are no exploitable bugs and the worst that can happen is a DoS attack.
RV901T is 8MB and even cheaper ($12)
That sounds so close to “chumby”.
Can those outputs be switched into 5v inputs? I guess not. Thinking about emulating C64 cartridge.
The info says “12x TC74VHC245 Octal Bidirectional Transceiver (used for level translation to 5V)”- sounds promising :-)
If it can truly handle 5V I/O then it’s already better than several FPGA dev boards with Arduino pinouts. Something you could actually connect to an Arduino LCD board, without worrying about voltage levels.
one of the first things done while reverse engineering is making some high resolultion photographs, as this is often more convenient then looking through a microscope for hours.
And if the reverse engineering is done by a hacker friendly entity, those photo’s are of course made publicly available, such as:
Have not kept up with the “latest” in TTL, but I’ll eat my hat if a VHV245 is not pin and function compatible with a 74245.
These chips are easy to removed and bridged Input to output with a few wires, which gives you 33 Ohm series resistors directly to the IDC connectors.
I’ll also eat my hat if the FPGA pins are not reconfigureable between output and input, just like (almost?) any regular micrcocontroller’s I/O pins.
In case I’m wrong: I do not own a hat.
It seems they have been removing decoupling caps untill the circuit (almost) stopped working.
Adding a bunch of those seems wize when your iron is hot.
Are there some pin combatible bidirectional buffers / drivers with the 74245?
As noticed later those on board are already bidirectional as per https://github.com/q3k/chubby75/blob/master/5a-75b/datasheets/TC74VHCV245FK_datasheet_en_20190131.pdf . However the DIR pin may be tied to low or high to force one direction.
Just flipping the DIR pin would not be enough: 1) the control signals are shared across all the connectors, and 2) the buffers only have one supply @ 5V, so if you swapped the direction it’d feed 5V into the FPGA IOs
well, so changing vcc to 3.3 would solve it? when set to output it would be still taken as 5v ttl high
It is kind of messy to lift pin for 3.3V and add decoupling caps though.
The plain old 74×245 has DIR at pin 1. From the layout, it looks like they tied it to ‘1’. i.e. output only.
There might be one of those bus switch level translation part that is pin compatible with the 74xx245. The nice thing is that they are bidirectional without requiring an external control signal.
Alternatively, use a resistor pack with isolated resistors and rotate the package slightly to connect up the pins pin2-9 to pin 18-12.
This. Output direction pin is tied high, to VCC/5V, so they’re output only. But you’ll fry the FPGA if you run them as input anyway…
Still might be interesting to desolder one of the buffers to get some 3.3V inputs.
There are level translators the autodetect the direction. They don’t have a DIR pin.
It would be interesting to find one that is pin compatible with the PCB
Does anyone know if there’s similar documentation for the E variant (5A-75E) of these boards? It has twice the hubs, and I assume twice the IO.
This board is nicer if you don’t need to deal with obsoleted 5V as it leaves the FPGA to choose the individual I/O directions. i.e. without the driver chips in the way.
Would be nice but why do you think so? The chips are probably on the other side, see photos in https://www.aliexpress.com/item/33010384708.html
Please don’t credit me (q3k) as the author of this hack. It is my repo, but the work has been done by https://github.com/tomverbeure .
Could be interesting as an ethernet CNC controller board for linuxCNC…
Great idea! Someone decided to implement this here:
While making modern hardware compatible with hardware from the 80’s and early 90’s, I have had experience with the 74×245’s in question – and having a 5V-capable dev board is a dream come true for this group of enthusiasts.
I would lift pin 1 of at least one chip, and put a bodge wire to (another FPGA output). This would control whether the 245 is directing traffic “in” or “out”. Of course, whatever FPGA programming was loaded, would need to allow the lines on that ‘245 to be I/O’s, and would need to manipulate the corresponding control line appropriately.
It would not be terribly difficult to implement an 8-bit or 16-bit CPU (or any 1980’s/early 90’s hardware) on one of these boards.
Re: pin direction. I wanted to do the same, but the trick with using 245s as level-shifters is that they run output at their VCC, but work with lower thresholds.
Which is to say: the chips are going to buffer your outside signals to 5 V and fry the poor FPGA inputs.
And you can’t run ’em in reverse easily either: the 245s aren’t really specced for input above their VCC.
A network of 5 V / 3.3 V voltage dividers wouldn’t be hard to cobble together, and you could desolder one of the buffers. But that’s some (not by any means impossible) board surgery.
As for a retro computer inside the FPGA. Yeah. That would be fun.
Can the open toolchain use the transceivers on ECP5 chips?
There are quite a few of these boards for sale, but often the FPGA is hidden by a sticker. Can somebody share a link to a seller that definitively sells the Lattice-version? I really want the FOSS-toolchain.
QMTECH has proper FPGA dev boards (https://qmtechchina.aliexpress.com/store/4486047) with only marginally higher prices but the boards are fully documented and even come with examples. Examples: Spartan6 with 256MB RAM for 20$ or Zynq7010 for 60$ delivered.
This looks pretty cool, Thanks!
Now I have some comparisons to do.
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