In this week’s podcast, editors Elliot Williams and Mike Szczys look back on favorite hacks and articles from the week. Highlights include a deep dive in barn-door telescope trackers, listening in on mains power, the backstory of a supercomputer inventor, and crazy test practices with new jet engine designs. We discuss some of our favorite circuit sculptures, and look at a new textile-based computer and an old server-based one.
This week, a round table of who’s-who in the Open Source FPGA movement discusses what’s next in 2019. David Shah, Clifford Wolf, Piotr Esden-Tempski, and Tim Ansell spoke with Elliot at 35C3.
The hackers over at Radiona.org, a Zagreb Makerspace, have been hard at work designing the ULX3S, an open-source development board for LATTICE ECP5 FPGAs. This board might help make 2019 the Year of the Hacker FPGA, whose occurrence has been predicted once again after not quite materializing in 2018. Even a quick look at the board and the open-source development surrounding it hints that this time might be different.
The ULX3S was developed primarily as an educational tool for undergraduate-level digital logic classes. As such, it falls into the “kitchen sink” category of FPGA boards, which include a comprehensive suite of peripherals and devices for development, as opposed to more bare-bones FPGA breakouts. The board includes 32 MB SDRAM, WiFi via an ESP-32 (supporting over-the-air update), a connector for an SPI OLED display, USB, HDMI, a microSD slot, eight channels of 12-bit ADC (1 MS/s), a real-time-clock, 56 GPIO pins, six buttons, 11 LEDs, and an onboard antenna for 433 MHz FM/ASK. This seems like a great set of I/Os for both students and anyone else starting FPGA development.
The ULX3S supports members of the Lattice ECP5 FPGA family, ranging from the 12F (12 k LUTs) to the 85F (84 k LUTs). What can you do with this much FPGA horsepower? Have a look at the long list of examples curated in the ULX3S Links repo. There, you’ll find code from retro-computing to retro-gaming, the usual LED and HDMI demos, and even Linux running on a mor1kx OpenRISC core. Maybe the most interesting links in the repo, however, are those that show how to program the FPGA with a completely open-source toolchain. Proprietary toolchains are the last link keeping some vendor’s FPGAs from wider adoption in the OSHW community, and it’s great to see people chipping away at them.
The board itself is completely open-source. In the GitHub repo, you’ll find the KiCAD 5 design files for the PCB released under an MIT-style license. Even more impressive is the advice in the README, which not only welcomes independent production of the boards, but gives some solid advice on dealing with PCBA vendors during manufacture. Our own advice is to do the right thing and offer the developers a cut if you decide to independently market this board, even though you aren’t required to by the license. If want one, but don’t want to manufacture your own, you can contact the developers using the email or gitter links at the bottom of the ULX3S page: they’re currently doing a small production run.
The Radiona Org folks have created a few videos showcasing example code. Check out how the on-board ESP-32 runs a web server that can load bitstreams into the FPGA (in this case for some retro-gaming), after the break.
Classic battles: PC vs Mac, Emacs vs Vi, Tastes Great vs Less Filling, and certainly one that we debate around the Hackaday watercooler: command line or IDE? There’s something to be said for using good old command line tools, and even if you like to configure your favorite editor to be nearly an IDE, at least it is one you are familiar with and presumably leverage over several different uses.
We were impressed because as IDEs go, QtCreator is both useful and lightweight, two things that don’t go together for many similar tools. [FPGAwars] has had an IDE based on Atom (apio-ide) although it hasn’t been updated in nearly a year. IceStudio sees more updates, of course, but it isn’t so much an IDE as a GUI-based code builder.
[Rochus-Keller] says there’s more to come. However, even at this early stage the IDE does syntax coloring, tooltips, inline messages, and can analyze source code allowing you to cross-reference symbols as you’d expect. There are configurations for Icarus to do simulations or you can use Verilator or Yosys — the synthesizer behind IceStorm. It appears it can also interact with Tcl-based workflows like those used by most FPGA vendor IDEs.
There’s quite a bit still on the to-do list, so we are excited to see where this is going. QtCreator isn’t hard to learn and it doesn’t’ feel as bloated as some of the big IDEs like Eclipse. If you want a quick introduction to QtCreator, we did that already. If you want to draw boxes instead of writing Verilog directly, try IceStudio.
One of the ways people use FPGAs is to have part of the FPGA fabric hold a CPU. That makes sense because CPUs are good at some jobs that are hard to do with an FPGA, and vice versa. Now that the RISC-V architecture is available it makes sense that it can be used as an FPGA-based CPU. [Clifford Wolf] created PicoSOC — a RISC-V CPU made to work as a SOC or System on Chip with a Lattice 8K evaluation board. [Mattvenn] ported that over to a TinyFPGA board that also contains a Lattice FPGA and shows an example of interfacing it with a WS2812 intelligent LED peripheral. You can see a video about the project, below.
True to the open source nature of the RISC-V, the project uses the open source Icestorm toolchain which we’ve talked about many times before. [Matt] thoughtfully provided the firmware precompiled so you don’t have to install gcc for the RISC-V unless you want to write you own software. Which, of course, you will.
Last time I talked about how I took the open source Verifla logic analyzer and modified it to have some extra features. As promised, this time I want to show it in action, so you can incorporate it into your own designs. The original code didn’t actually capture your data. Instead, it created a Verilog simulation that would produce identical outputs to your FPGA. If you were trying to do some black box simulation, that probably makes sense. I just wanted to view data, so I created a simple C program that generates a VCD file you can read with common tools like gtkwave. It is all on GitHub along with the original files, even though some of those are not updated to match the new code (notably, the PDF document and the examples).
If you have enough pins, of course, you can use an external logic analyzer. If you have enough free space on the FPGA, you could put something like SUMP or SUMP2 in your design which would be very flexible. However, since these analyzers are made to be configurable from the host computer, they probably have a lot of circuitry that will compete with yours for FPGA space. You configure Verifla at compile time which is not as convenient but lets it have a smaller footprint.
We like the ICE40 FPGA from Lattice for two reasons: there are cheap development boards like the Icestick available for it and there are open source tools. We’ve based several tutorials on the Icestorm toolchain and it works quite well. However, the open source tools don’t always expose everything that you see from commercial tools. You sometimes have to dig a little to find the right tool or option.
Sometimes that’s a good thing. I don’t need to learn yet another fancy IDE and we have plenty of good simulation tools, so why reinvent the wheel? However, if you are only using the basic workflow of Yosys, Arachne-pnr, icepack, and iceprog, you could be missing out on some of the most interesting features. Let’s take a deeper look.
[Roland Lutz] gave a talk about FPGA design using the free tools for Lattice devices at the MetaRheinMainChaosDays conference this year. You can see the video below. It’s a great introduction to FPGAs that covers both the lowest-level detail and some higher level insight. If you’re getting started with these FPGAs, this video is a must-see.
[Roland] starts with the obligatory introductory material. He then jumps into an actual example before zooming back out to look at the internal details of the Lattice FPGA. For instance, this FPGA supports multiple bitstreams, so you can switch between different “programs” on the fly.