Open source logic analyzer

[Jack Gasset] sends in the logic analyzer he’s been working on. The logic analyzer boasts an impressive array of features, it can sample 32 channels at 100MHz, 16 channels at 200MHz, SPI, UART, I2C and more. The analyzer’s maximum sample size is 4K for now, and it supports RLE to reduce the memory consumed. The analyzer connects to a java client on a standard PC via USB. The open source hardware based on a Xilinix FPGA can be purchased pre-assembled for $100 which makes it a direct competitor for the Salea logic analyzer we reviewed earlier this year.

19 thoughts on “Open source logic analyzer

  1. I always found the Saelig unit quite expensive for its limited features. This is quite an improvement, and if you want to you can change it into a general purpose FPGA dev board. It has a nice beefy FPGA on board.

    This kind of logic analyser has always been on my TODO list ;-).

  2. I got the saleae logic analyzer a while back. I still haven’t been able to use it as intended since the cross platform client has been slow in materializing (and I don’t really feel like putting together a dedicated Windows machine for supporting a little tiny logic analyzer gizmo). I have been able to play with it in a Windows virtual machine, but the USB capture speed is severely limited under those circumstances.

    I still like the adorableness of the saleae though. It’s a nice little product that I can’t use yet. Oh well, I guess I’ll keep waiting.

  3. it’s getting pretty close to competitive to what I have. i took the zeroplus logic analyzer suggestion someone gave, and the thing is excellent. i just wish you didn’t have to buy extra protocol packs, or a plugin system…

    i might switch to this after it’s been time tested (honestly, i’d much rather not rely on an unsupported platform for something i’m using as a debug tool) and after there’s an input protection boar, bigger buffer, things that’ll let it survive higher voltages.

  4. i have (sump)michael poppitz’s version and the omla32, it works really well.

    the best thing is being able to repurpose the fpga, i ended up with the 1000K gate spartan starter board.

    The biggest PITA is the Xilinx WebPack.

  5. Mmm I wonder when everyone decided that sticking X chip on a board and adding the required external components as per the vendor’s datasheet meant they suddenly had some amazingly valuable “platform” or something. Yes, every generic board with some FTDI chip and a pin header needs some cringe-worthy title.

    That aside, there are boards in the same price range with the same FPGA but have a config rom, flash and SDRAM ram on board. They could have probably used a cheaper device (the sort you can buy for $19 already mounted on DIP adaptor) and made their hardware a lot more attractive.

  6. does only low end hobbyist level chips like the others. SPI/JTAG/I2C/UART are just protocols. They’re useless if the hardware can’t handle the bandwidth; which these can’t on more advanced buses.

  7. it compares well to my pctestinstruments usb analyser, great speed, decent buffer size.

    i’ve used it to succesfully trace the data bus on an AM29F400BB flash chip running off a siemens 167CR, something my cheapo usb ones can’t do, so i wouldn’t call it same as the hobbiest ones.

  8. Here are the specs of the sump for comparison to the usb ones.

    •16 channels at 200MHz sampling rate
    •32 channels up to 100MHz sampling rate
    •state analysis up to 50MHz using external clock
    •256KSamples memory
    •noise filter
    •complex serial and parallel trigger with four stages
    •externally available sampling clock to drive add-ons (like ADCs)

  9. Honestly, I don’t see a difference in the features between this and the Sump one. The specs don’t seen different just reworded slightly. The only difference I can see is in price. The dev-kit the original Sump project was based on costs $149 directly from Xilinx (not 100% sure I’m looking at the right version of the dev-kit or that there isn’t a cheaper source to buy it from) while the one referenced by the OP seems to be only $100.

  10. Hello, this is Jack Gassett from Gadget Factory. I just want to clear up any questions about this project.

    This IS the “Sump” Logic Analyzer that has been modified to run on the Butterfly Light hardware. A lot of credit goes to Michael Poppitz for writing the VHDL and the Java client. What is unique about this project is that the hardware is an Open Source design. You can download the Eagle board and schematic files and build this yourself if you are comfortable with surface mount soldering.

    Linux, this should be very easy to get running on Linux. Urjtag, which is a linux tool, is used to program the Xilinx chip and the client is in Java. I will work on getting this working under Linux and record some screencasts, look for some progress next week.

    Speed, since this is based on FPGA technology this is very fast. It is surprising how well it works. I’ve used the “Sump” Logic Analyzer for years with great results.

    If your livelihood depends on a Logic Analyzer then this is probably not for you. But if you are looking to add something extremely useful to your workbench then this is a great addition. What you get is an extremely functional Logic Analyzer right now. But you are also buying an FPGA dev kit that allows you to become involved with other interesting FPGA projects. Planned projects include an AVR compatible processor, Flash Programmer, and Oscope to name a few. Dev kits normally provide a couple examples, once you work through the examples you are on your own. The goal of Gadget Factory is to build a community where more advanced and interesting projects are pursued. Or use the hardware to develop your own project, once you have developed the next greatest thing you can start selling it with the Butterfly Platform hardware. The Creative Commons license allows derivative works to be released under the license of your choosing. Thats the difference from an FPGA dev kit. If you get something running on a dev kit you are stuck because it is not practical to sell a dev kit. But if you get something running on the Butterfly Platform it works just like the Arduino, as long as you provide attribution you can do whatever you like with it.

    Hope this post is helpful.
    Jack.

  11. I always wonder why people build their own crappy logic analyzer instead of buing a cheap HP or Tek logic analyzer at E-bay.
    A good HP16500C logic analyzer costs around 300$ and has 4M sample depht at 500MS/S (with HP 16557D, or 4GS/S and 64k with HP 16517 card), variable logic levels, a lot more channels, sometimes a included scope, a nice case and terminated probes.

    The HP 16500 cards are also FPGA based, Altera IIRC. And its technology is 15years old.
    So with todays FPGAs it should be possible to build somethig better than a 200MHz Logic analyzer with 4k sample depht and 16 channels.

  12. I looked around for FPGA based logic analyzers, and sure, the sump.org thing is cool (so is this port).

    However, what I usually need less is sampling speed, instead I need a deep sample capture buffer. So I’ve built (together with bushing and johnk) cheapla ( http://code.google.com/p/cheapla/ ), which runs on off-the-shelf spartan 3a / 3e starter kits, can be ported easily to other platforms. It ultimately uses DDR-SDRAM to store the samples, but uses blockram as buffers. This results in a pretty high peak capture speed (120 MHz x 40bit for Spartan-3A, for example, could be tweaked to 240 MHz x 20 bit etc.), and can capture up to 32MB of data (i.e. 4 Megasamples – limited by the on-board ram, so a XUP-V2P could store up to a 1GB of samples, possibly at a lot higher speed). The catch is that the memory rate is limited at about 250 MB/s (S3-A Starter, other boards differ), so the averaged speed (after FIFO) cannot exceed this limit. In the usual jobs, for example sniffing I2C or SPI traffic, this is more than enough. Of course it uses “sample compression” by just storing when signals change, and adding a timestamp.

    Cheapla doesn’t yet has a software frontend. Instead, it uses a microblaze to provide a HTTP frontend, which gives access to the basic functionality (start, stop, set trigger, set state mask …) and download of the sampled data via ethernet. This makes remote sampling possible. Sample decoding scripts are provided for I2C.

    I developed cheapla basically to have a “data sink”. It doesn’t replace your scope, but once you found the pins you want to capture, cheapla usually does a great job in capturing. I’ve used it successfully to capture PCI-like busses, long and complex SPI protocol transactions (firmware download, Cell/CBE core configuration)

    Cheapla isn’t probably what you’re looking for if you plan to replace a benchtop analyzer. But it’s great for everybody who ever wanted to capture a lot of data after knowing exactly what to look for.

    Oh, and it’s cheap. A Spartan-3A Starter kit costs like $150. You won’t get any useful logic analyzer for less than a few k$. I have a Tek TLA 604 which I hate. I once had a GoLogic U72-2M which was pretty cool, but that thing is (still) $5k.

  13. the logic can do up to 1000 megasamples, but i think that’s just an arbitrary limit of the software since capture is realtime over USB. it’s nice for capturing complete conversations.

    i suppose this is always going to be the trade-off: if you use an on-board RAM buffer you are limited by the amount of RAM (cheap now), but if you use USB alone you are limited by USB 2.0 bulk transfer rates.

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