Anyone who’s ever had the pleasure of programming FPGAs knows that it’s a land of proprietary tools that almost require marriage level commitment to a specific platform to be effective. Symbiflow hopes to solve this by becoming the GCC of FPGAs.
Rather than a tool built around a specific chip or architecture, Symbiflow will provide a more universal interface. Users can program in Verilog; architecture definitions define how the code will be compiled for the right chip. They are currently targeting the popular Xilinx 7-series, the very affordable iCE40 series from lattice, and the ECP5 FPGAs also from Lattice.
If you’re headed to Hackaday Supercon this year, [Timothy Ansell] will be giving a talk on how Symbiflow is making this process much more approachable and much less proprietary. Overall we’re very excited about a common interface, especially as the price of FPGAs keep dropping into micro controller territory while also increasing in capability.
(Speaking of Supercon, and maybe this is a spoiler, the badge would not have been possible without Symbiflow, Project Trellis, Yosys, and NextPNR.)
The BBC Microcomputer System (or BBC Micro) was an innovative machine back in the early 1980’s. One feature that impressed reviewers was a “tube” interface that allowed the machine to become an I/O processor for an additional CPU. When the onboard 6502 became too slow, it could become a slave to a Z-80 or even an ARM processor. The bus was actually useful for any high-speed device, but its purpose was to add new processors, a feature Byte magazine called “innovative.”
[Hoglet67] has released a very interesting set of FPGA designs that allows a small board sporting a Xilinx Spartan 3 to add a 6502, a Z80, a 6809, or a PDP/11 to a BBC Micro via the tube interface. There’s something satisfying about a classic computer acting as an I/O slave to a fairly modern FPGA that implements an even older PDP/11.
Continue reading “Vintage BBC Computer Gets FPGA Buddies”
[Jack Gasset] sends in the logic analyzer he’s been working on. The logic analyzer boasts an impressive array of features, it can sample 32 channels at 100MHz, 16 channels at 200MHz, SPI, UART, I2C and more. The analyzer’s maximum sample size is 4K for now, and it supports RLE to reduce the memory consumed. The analyzer connects to a java client on a standard PC via USB. The open source hardware based on a Xilinix FPGA can be purchased pre-assembled for $100 which makes it a direct competitor for the Salea logic analyzer we reviewed earlier this year.