Playing MP3s From An FPGA

Building an audio player is a fun project. It used to be quite a task to do so, but these days the MP3 decoder chips are full-featured which means that if you know how to talk to other chips with a microcontroller you’ve got all the skills needed to pull off the project. But that must have been too easy for [Ultra-Embedded], he decided just to build an MP3 player out of an FPGA.

It’s not quite as difficult as it first sounds. He didn’t have to figure out how to decode the audio compressions. Instead he rolled the Helix MP3 decoder library into the project. It had already been optimized to run on an ARM processor, and since he’s using a RISC soft processor the translation wasn’t tough at all. He’s using a 24-bit stereo DAC chip to bridge the gap between the audio jack and the FPGA output. Clocking that chip with the FPGA isn’t ideal and causes 44.1 kHz audio to run 3% too slow. He says it’s not noticeable, which we believe. But if you try to play along with a song the pitch shift might end up driving you crazy.

If you’d prefer to just stick to the microcontroller based players this one’s small and inexpensive.

7 thoughts on “Playing MP3s From An FPGA

  1. Ok, nice project… though I can’t for the life of me imagine why you’d want to take a perfectly good (but somewhat expensive – E22 here) FPGA and implement a soft-core in it, needing an extra SRAM-chip to make it work. Why not just get one the all-in-one ARM SOCS like the new Cortex-M4s? They run on 100+ MHz and have integrated DSP-features, so they should be able to decode any sound format with ease.

    1. Hmm, just realized the answer is probably the most universal one here in hacker-land: because it is possible :) If you want to make an mp3-player from scratch and don’t have the intention to learn softcore-processors from it, you may want to take a look at the separate chips or the ARMs out there.

  2. Right Sprint_tm, sometimes you just do a project because you want to and you will lean a lot from it.

    I’m not entirely clear if he wrote the MPX core from scratch, ported it from someone else’s VHDL or just modified a verilog soft-core to meet his specific needs. in any event, it’s very impressive to have a created/debugged 32-bit MIPS-like core. And could be very useful for all kinds of interesting projects. The MIPs architecture is neat and simple enough to really wrap your mind around it for doing high-performance, low-level stuff.

    This is a cool project and he has made some nice contributions to open-source hardware and software with this core and his FAT library. Well done.

    1. Yeah, I agree after taking a second look at the article. At first glance, I thought he went just for utility; taking an FPGA, throwing an existing softcore to it and slapping an mp3-decoding lib on top. He did a tad more than that, and had to debug the complete stack for that, which is a lot more work.

  3. DanJ/sprite_tm,
    The soft core processor ‘mpx’ was developed from scratch for first use in this project.
    Writing and then verifying the core’s ability to execute code reliably tracking down strange pipeline related bugs probably took 85% of the project time (including developing a software simulator of the core too), writing the audio specific verilog modules such as i2s, audio fifo’s, sd dma, etc probably took less than 5%.
    Writing the actual software didn’t take very long as I had already written the RTOS & file system libraries, and being able to pick up and run with the helix mp3 decoder was pretty simple.
    I have also just released the mpx core as a seperate block and published it on opencores, so hopefully others will find a use for it.
    I hope to re-use it in lots of other projects in the future too!

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