We like cheap FPGA boards. It isn’t just that we’re cheap — although that’s probably true, too — but cheap boards are a good way to get people started on FPGAs and we think more people should be using FPGAs more often. One inexpensive board is the Max-1000 from Trenz and Arrow. At $29, it is practically an impulse buy. [ZipCPU] did a great write up on his experience using the board. He found that some of it was good, some was bad, and some was just plain ugly. Still, for $30, it seems like this might be a nice board for some applications or for getting started.
Billed an IoT Maker Board, the tiny board sports a Intel (formerly Altera) MAX10 device with 8,000 logic elements, a USB programming interface onboard, 8 MB of SDRAM, and both PMOD and Arduino MKR headers. The MAX10 has an analog to digital conversion block (with an analog mux for up to nine channels) and the ability to host a 32-bit soft controller onboard, too.
On the good side, the board is cheap and powerful. It doesn’t have a lot of I/O on board, but it has enough expansion options that you shouldn’t have any problems. The bad side was mostly documentation and driver issues. [ZipCPU] kindly linked to the documentation he’s found. He also mentioned it was hard to tell where pin 1 was on the board. However, we noticed in photographs the PCB has square pads to indicate pin 1, so maybe he had an earlier version and this has been corrected. Still, if you were a beginner, this is the kind of thing that could put you off.
The biggest problem, though, was the lack of Linux drivers. This was later fixed, but he found the Linux drivers didn’t work, and required him to remove other FTDI drivers which was not convenient. The good news is that the open source libsvf driver worked fine. If you are planning on using this board with Linux, you really need to read these instructions. We tried the same drivers and noticed, however, that they will work, but they are flaky. As mentioned in the review, you have to unload the FTDI drivers, but you also have to kill the jtagd server so it will find the adapter if it ever starts with the wrong drivers. We’ve also had jtagd just lose the adapter and require a reboot to find it again. So the libsvf drivers are better, although it is certainly less convenient.
By the way, Trenz has other versions of this board that cost a little more but have more memory and logic elements. You can find them on their site along with the one Arrow is selling, although last time we checked they were out of stock.
We’re always looking for small cheap FPGA boards. If you want really tiny, check out this design over on Hackaday.io.
Ah, FTDI chips, once the masters of serial ,but ever since the clone wars,sigh, they have now taken a arrow board to the knee.
From what I can tell, it isn’t an FTDI problem in this case. The ugly bit of the review involved blacklisting the driver to use something else that didn’t work – but the redeeming section involved using libsvf and that works without the blacklisting – so a) I’d hardly say it was FTDI’s fault, if it can be made to work without kludgery b) I’d hardly say the board has been taken to it’s knees.
It was not FTDI to blame, it was Altera. (I had some experience with Altera, and well – adding your own jtag adapter is more or less impossible – no documentation of the API/etc. So people end up either paying outrageous sums for original one, cloning byteblaster or doing windows-only solutions with FT2232 – because there was a .dll file for it somewhere in the depths of Altera hell. And no, the remote protocol is undocumented too.)
The problem is the FTDI libraries are statically linked. I don’t know if that’s Altera or Trenz. I’m sure they are trying to make it as plug and play as they could, but FTDI is so widespread that most of us will already have the driver loaded. You would think they could detect it and not initialize their copy.
It never ceases to amaze me… about 15 years ago, I recall development boards being hideously expensive, as they didn’t care about the home hobbyist, or even the student… they were only interested in selling to other businesses.
Then boards like the Arduino and the Raspberry Pi came out … and whamo… now everyone wants a piece of the action!
Same here. Although I’d like to add by far not every devel kit can be had for really cheap; that’s mostly reserved for the bottom scraping tier. Then there’s the mid level tier which is still affordable but you have to really want it to pull the trigger. And then there’s the upper class kits where you still have to pay through the nose to get one.
Agreed, but back then, *none* of them were cheap. Even the Raspberry Pi’s oldest competitor, the BeagleBoard, was a pricey option compared with what they charge for the BeagleBone today.
I agree. I remember raking many yards and baby sitting a bunch to get my first PIC programmer.
“affordable but you have to really want it to pull the trigger” is, I think, the whole joy of the bottom tier. They may be bottom tier for a good reason, but they’re usually get you far enough to enable that “have to really want it” tier. “I keep hearing about xyz” might be enough to get me to impulse-buy a $50 board, but not a $500 board. “I’ve outgrown the $50 board” might, however.
Cheap SDRs are like that. Once you get beyond a certain point.
To be fair the Raspberry Pi wouldn’t have been possible without heavy govermental sponsorship (at least at that price point), so the BeagleBone really just illustrates how limited run (ie: not in the millions) device development and support can’t reach “consumer” level prices without some addintinal backing and sponsorship.
Why do you say this? I don’t believe that is accurate. For example: https://www.stuff.tv/news/exclusive-raspberry-pi-was-turned-down-funding-uk-government
It’s libxsvf not libsvf. Those are two very different libraries.
Interesting that he doesn’t seem to have heard of the Lattice Icestick…
That’s a joke, right?
Start off with Al’s five-part intro-to-FPGA series using the Icestick. (https://hackaday.com/2015/08/19/learning-verilog-on-a-25-fpga-part-i/)
Seriously, he’s written more on the lattice FPGA than the rest of us combined. You can’t get mad at him for writing about another chip. :)
Not Al at all – I read that series only last week… ZipCPU, the author of the reported article.
Are you sure you read the linked article? It clearly says Al Williams wrote the article and I can find no mention of ZipCPU.
Yes. Al wrote the HaD article, ‘ZipCPU’ wrote the linked article.
From Al’s text above : “[ZipCPU] did a great write up on his experience using the board”.
Anyway, we’ll mention the IceStick. Heck, I’ll mention the Ice40 8k demo board, which has a ton more pinouts, a much bigger FPGA, and is still only $40.
Free and open development tools are killer.
Just to point out, the second to last link in the post is a search for “lattice icestick” ;-) Actually, I meant to link to a specific post and I guess I got cut/paste happy, but it still works.
On an unrelated note, I have always been pretty good about not being too zealous over one tool or another. Well, except for emacs which Elliot and I go ’round and ’round over. But that, of course, is different ;-) I do occasionally succumb to anti-zeal where I don’t like to use certain products or tools from a particular vendor for some kind of meta reason, but that’s pretty rare.
So for my understanding: is 8000 gates enough for some soft cpu core? Of would this really be just for ASIC-like stuff?
certainly is!
when we played with it – 5000 gates of Cyclone 1 gave us MIPS3000 compatible CPU, some peripherials, a bit of RAM to run from and there was place to spare.
And there are much more compact cores.
There is an example file that implements a NIOS core.
It isn’t 8000 gates it is 8000 logic elements, in altera speak gates =/= logic elements, a logic elements is a collection of gates and other functionality.
students + no FPGA learning = NOT engineers FPGA (simple) and no sales
What the heck does that mean? If a manufacturer can put out a getting-started prototype board with user-friendly easy to install cross-platform tools and parts that have accessible pin-outs, then the students will eventually graduate/grow-up and continue using the manufacturer’s parts. It’s simple from a manufacturer’s position: Make it easy for new potential customers to get pregnant, then many-many babies will follow…
http://www.latticestore.com/searchresults/tabid/463/searchid/1/searchvalue/ice40hx1k-stick-evn/default.aspx
How does the IO work with this?
Trenz board are well made but really lack on the silkscreen and documentation part. Icoboard is the same, you can’t tell the connector name from the board, neither expansion numbering. There is even conflicting docs about it.
The silkscreen appears to indicate the connector name on the underside: https://wiki.trenz-electronic.de/display/PD/TEI0001+TRM (Could be a bit more readable…? The Wiki appears to have moved since the review)
I thought that, typically on PCBs, pin 1 of a connector was marked either on the silkscreen with a 1 or a triangle or on the copper layer with a square pad. In the picture on the review, I can make out the a square pad on each of the connectors. (The PMod connector is a bit harder to see, though)
My knowledge of PCBs doesn’t go as far beyond that as I’d like, though.
This one seems better (yes square pin is always pin1).
On icoboard is was way less good (no connector name)
You can see the square pins on the picture (Fig 1 – the reviewer may have updated the picture in their review – or may just not know about the square pin) on the review – as I said, the one on the PMod connector is a bit more iffy –
but it is there.
J6 (The PMod port) and J9 (The USB port) appear to be unmarked – although you’re not going to mistake them.
Looks like the Discovery board which was only $10
I’d rather pay a tiny bit extra for this…
https://www.olimex.com/Products/FPGA/iCE40/iCE40HX8K-EVB/open-source-hardware
take a look at the circuit diagram, just about everything you could want from a board (at that level) not too much fixed stuff (there is some sram) but basically as many IO’s accessible as possible – great!
The thing is, this is a low-cost way into the Intel/Altera system including enough to run NIOS II. So if you want to learn SoC where you integrate an FPGA with a CPU, have the possibility to add instructions to the CPU and do codevelopment, this is a bargain. I like the Lattice stuff, too, but from a marketability of skills point of view….
Am I missing something? Why SDRAM and not plain old SRAM? And not just this board, it seems that FPGA dev boards almost universally go for SDRAM over simpler SRAM. Granted you get more space, but the cost seems to be complexity.
Doesn’t SDRAM require some control logic in order to arrive at a simple address/data/write-enable kind of interface? Doesn’t this imply dual burdens of (1) devoting part of your finite amount of configurable logic to perform that function, and (2) having to manage the extra vhdl or verilog needed to implement it?
Do some FPGAs include hard wired SD controllers? Or lacking that, is there a way to just plop in a soft SD controller, from the vendor libraries? The only avenue I’ve seen so far is to either d/l something of unknown quality or roll-your-own. Afaik modern SD includes burst modes and etc for supporting interaction with cache systems, various options for refresh, etc.
In short, is there some *easy* way to make use of SDRAM? I’ve several small FPGA boards, and I’ve yet to use SDRAM in any of my projects, having stuck with whatever block RAM is internal to the FPGA. Idk how many times I’ve wanted to trade say 32GB of SDRAM for 512K of SRAM that I could just use w/o all the fanfare.
SDRAM isn’t as bad as it sounds, but it can be a hassle if you’ve never built a controller for it. I was planning to use an SDRAM controller I’d already written for the XuLX-LX25 with this board,
https://github.com/ZipCPU/xulalx25soc/blob/master/rtl/wbsdram.v
I’ve also just finished formally verifying the controller, so when time permits I hope to blog about both how the controller works, and how the formal proof was valuable.
ZipCPU
Keep in mind, too, there are plenty of IP out there for SDRAM. There are plenty on OpenCores including https://opencores.org/project,ddr3_sdram and usually, the vendor has some too. Quartus Prime has a DDR3 controller using “UniPHY” which I have not tried with this board, but since NIOS probably uses the same thing, I bet it works.
You just go ahead and let me know when you find an affordable 64 megabyte SRAM chip. 64 megabyte SDRAM chips are cheap as dirt.
Perhaps I didn’t make my point. If all you need is a meg of RAM, it doesn’t matter if whether there’s 8GB or 64GB of ram out there, you’re stuck with the complexity. There is a middle ground between the 64K or so you get internally in low end FPGA, and the gigabyte-plus available by SDRAM, that could easily be hit with SRAMs. I’d love to implement a classic 68K Mac on one of these low cost boards, but the SD controller is usually the hurdle that squelches those urges. If there was a board with just a couple of megs of ram I could just use, I’d like to know. It’s a complexity/capacity trade off, and for some reason the smaller-but-simpler trade seems completely under represented.
I agree completely. Especially for retro-computer work, SRAM would make things MUCH easier.
I once had to work with a 3rd party DDR RAM controller, and it was rather a pain in the posterior (this was for an ASIC). If you don’t absolutely need a lot of memory, give me SRAM any day.
While you CAN write your own DRAM controller, making one efficient is a bit more difficult. Plus, if you deal with DDR, you have a PHY to deal with, and all sorts of timing issues. No thanks.
Also my experience (somewhat dated) is that to use a drop-in DRAM IP for an FPGA, you may have to license it. This was several years ago using Xilinx CoreGen.. I don’t know if that has changed.
I totally agree. For a beginner I would strongly recommend SRAM instead of SDRAM. There are FPGA boards out there with SRAM.
Add to that the driver issues and I would say that this small board is far more suited to someone with more experience that a beginner.
From what I read in your post. It sounds like another Orange Pi. Were they only did half the work and sent it out.
I tried and tried with the Orange PI’s got them to do half my jobs that I wanted them to do.
Now they finally came out with a board with a H5 cpu and no stock. There is a new company on toronto that has a promising computer. Next time I’m out there Im going to stop in.
I know this is like comparing a apple to a peace of wood, but what the hay.
Very nice job you did. Thank-you for all the info that you posted that the manufacture should of.
And Me I think they should do something for you!! For all the Great work you did.
One day its going to be a Hacker that saves the world. And it will be very publicised that they did..
I run more then a few orange pi’s never had a single issue out of them. They just work great for me.
Last time I checked MAX family was CPLD not FPGA? Have this changed?
The MAX 10 is a non-volatile FPGA.
Apparently:
“MAX 10 FPGAs are built on TSMC’s 55 nm embedded NOR flash technology, enabling instant-on functionality. Integrated features include analog-to-digital converters (ADCs) and dual configuration flash allowing you to store and dynamically switch between two images on a single chip. Unlike CPLDs, MAX 10 FPGAs also include full-featured FPGA capabilities, such as Nios® II soft core embedded processor support, digital signal processing (DSP) blocks, and soft DDR3 memory controllers.”
I was about to say the same — max isn’t FPGA?
If you are interested in low-cost FPGA boards take a look here:
https://www.edn.com/electronics-products/electronic-product-reviews/fpga-boards-under–100–hands-on-reviews-collection/4431752/FPGA-boards-under–100–Introduction
Arrow make relatively inexpensive boards that look nice, but their support kinda sucks. Custom, non-standard and Windows-only configuration tools, BSPs that aren’t updated beyond the first release etc. Wouldn’t be my first choice if you think you might need help from others.
Cool article! Thanks for the reference!
I’ll admit, the board I had did have square pins. At the time I wrote the article, I didn’t realize that the square pin would be pin #1. I’ve since learned. ????
ZipCPU
Hey Dan. Well, the connector names on the back isn’t helpful either. Usually (not always) the connector name is near pin 1 too. Great write up. I actually bought the board (if you couldn’t tell) and I figured out more about why the FTDI drivers are an issue if you want to try again.
Enjoyed your post, as always.
Fwiw, I’ve certainly come across my share of boards where pin 1 was the one *next to* the square pin. In an era where cost is a driving factor, it’s probably even more likely we’d run into boards with flipped headers, etc. Probably wise to verify, even when clearly marked.
Is there some FPGA-board that is both cheap *and* has actually good documentation for a complete FPGA-novice to get going, or are good documentation and cheapness mutually exclusive things? I don’t expect such a novice-oriented board to be very powerful, so that’s not a concern.
The board you choose is less important that other things.
Getting started with FPGA (or CPLD) is more about the Integrated Design Environment (IDE) and learning a Hardware Definition Language (HDL).
The first step (which most people here have done) is to understand AND, OR, NAND, NOR, XOR and NOT (inverter) gates and then the different types of registers – SR Flip Flop, JK Flip Flop, D Flip Flop.
Then choose the IDE and therefor the manufacturer. The Xilinx IDE (ISE) is very powerful but it’s cumbersome and hard to learn so I recommend starting with the Altera IDE (Quartus).
Then choose you HDL. Veralog is the most popular in the US but most people in the US use both Veralog and VHDL. VHDL is more popular in other parts of the world.
I chose VHDL because I am a programmer to so I didn’t want a HDL that had programming-like syntax as it’s confusing. Coding in a HDL is nothing like programing.
If you are familiar with logic at a gate level then I would recommend VHDL.
You don’t need to get a board with all the bells and whistles to start with.
The boards I would recommend depend on if you like to wire things up or perhaps use a breadboard.
If you don’t like wiring things up then choose a dev board that has inbuilt peripherals – switches, leds, perhaps a VGA socket and some DAC.
If you are comfortable wiring up peripherals then just take the cheap rout and get a CPLD dev board from eBay.
There are lots of cheap Altera Cyclone boards on eBay and the JTAG downloader is about $5.
There are also lots of cheap XILINX CPLD boards on eBay but the Xilinx downloader is about $30.
If you want to wire up peripherals yourself then keep in mind that there are not many 5 Volt tollerent dev boards. Most FPGA or CPLD is max 3.3 Volts.
My past favorite boards were –
This Xilinx based combo –
http://papilio.cc/index.php?n=Papilio.PapilioOne
http://papilio.cc/index.php?n=Papilio.LogicStartMegaWing
or any of the cheap Altera Cyclone dev boards from eBay.
People have very different ideas of what “cheap” means, but Digilent make boards and training material specifically for educational markets. They offer fairly substantial acamedic discounts for students and teachers. While I haven’t used any of their products myself, they are well-regarded.
support your own guys; Tinyfpga boards on hackaday.io?