FPGA Snake Game Uses No VHDL At All

We’re really not supposed to start a feature like this; but this hack is awesome. It’s a game of Snake implemented by an FPGA dev board. It uses a 16×16 LED matrix as the display and an SNES controller for input. So far it sounds like a very normal version of the game. But as you start to hear how it works in the presentation after the break you fall in love with what’s going on here.

First of all, it’s not written in VHDL — the predominant programming language for FPGAs. Instead, [Darrell] used the schematic-only approach to build the logic. Okay, that’s starting to get more interesting. As he continues to explain the circuit we get to see how the control input works (pretty simple since the SNES controller uses a parallel-to-serial shift register) and how the display is multiplexed. But the actual game logic is where things really take off. Each pixel in the display has its own individual logic circuit. Basically every cell is its own processor which reacts both to what is passed into it, as well as to a random seed. That seed system is called the ‘bucket brigade’ and passes a chance to spawn a piece of food from one cell to the next. All of this together makes for one simple game that is eloquently executed.[youtube=http://www.youtube.com/watch?v=niQmNYPiPw0&w=470]

18 thoughts on “FPGA Snake Game Uses No VHDL At All

    1. Indeed, it actually is – you can do file io, unbounded loops, and line by line execution in the VHDL spec; the fact that it is generally targeted at hardware, where you can’t do those things, doesn’t mean that the language itself isn’t a programming language. Check out the simulation-level routines for a look at what is possible :)

      Also, how does the name VHDL state its a programming language? It stands for Very high speed integrated circuit Hardware Description Language, no where do they mention programming.

      1. He’s talking about the article description, where it says

        “First of all, it’s not written in VHDL — the predominant programming language for FPGAs.”

        And really, it’s a hardware description language, I wouldn’t strictly consider it a programming language.

  1. This is very nicely done. I especially like how the presenter described what he had learned from doing the project.

    Beautiful work!

    I loved my Digital Logic class in college. It was definitely my favorite class. I was not aware that you could program schematics into FPGA chips. I will have to look into that.

    1. I think the point is that this was done via a schematic editor and the vast majority of people (those that I’ve read about anyways) are using Verilog or VHDL.

      I’ve been researching FPGA/CPLD for my own project and there seems to fewer projects and documents that leverage the schematic editors as opposed to HDL’s. Of course, I’m coming from a software developer’s point of view so my search terms might be lilted towards HDL hits. An EE doing research might find more schematic based documents. :\

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