iCE40

25 Articles

FPGAs For The Raspberry Pi

October 18, 2015 by 101 Comments

FPGA development has advanced dramatically in the last year, and this is entirely due to an open-source toolchain for Lattice’s iCE40 FPGA. Last spring, the bitstream for this FPGA was reverse engineered and a toolchain made available for anything that can run Linux, including a Raspberry Pi. [Dave] from Xess thought it was high time for a Raspberry Pi FPGA board. With the help of this open-source toolchain, he can program this FPGA board right on the Raspberry Pi.

The inspiration for [Dave]’s board came from the XuLA and StickIt! boards that give the Raspberry Pi an FPGA hat. These boards had a problem; the Xilinx bitstreams had to be compiled on a ‘real’ PC and brought over to the Raspberry Pi world. The new project – the CAT Board – brings an entire FPGA dev kit over to the Raspberry Pi.

The hardware for the CAT Board is a Lattice iCE-HX8K, 32 MBytes of SDRAM, a serial configuration flash, LEDs, buttons, DIP switches, grove connectors, and SATA connectors (although [Dave] is just using these for differential signals; he doesn’t know if he can get SATA hard drives to work with this board).

Despite some problems with his board house, [Dave] eventually got his FPGA working, or at least the bitstream configuration part, and he can blink a pair of LEDs with a Raspberry Pi and programmable logic. The Hello World for this project is done, and now the only limit is how many gates are on this FPGA.

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Hackaday Prize Entry: They Make FPGAs That Small?

July 3, 2015 by 62 Comments

There are a few development boards entered in this year’s Hackaday Prize, and most of them cover well-tread ground with their own unique spin. There are not many FPGA dev boards entered. Whether this is because programmable logic is somehow still a dark art for solder jockeys or because the commercial offerings are ‘good enough’ is a matter of contention. [antti lukats] is doing something that no FPGA manufacturer would do, and he’s very good at it. Meet DIPSY, the FPGA that fits in the same space as an 8-pin DIP.

FPGAs are usually stuffed into huge packages – an FPGA with 100 or more pins is very common. [antti] found the world’s smallest FPGA. It’s just 1.4 x 1.4mm on a wafer-scale 16-pin BGA package. The biggest problem [antti] is going to have with this project is finding a board and assembly house that will be able to help him.

The iCE40 UltraLite isn’t a complex FPGA; there are just 1280 logic cells and 7kByte of RAM in this tiny square of programmable logic. That’s still enough for a lot of interesting stuff, and putting this into a convenient package is very interesting. The BOM for this project comes out under $5, making it ideal for experiments in programmable logic and education.

A $5 FPGA is great news, and this board might even work with the recent open source toolchain for iCE40 FPGAs. That would be amazing for anyone wanting to dip their toes into the world of programmable logic.

The 2015 Hackaday Prize is sponsored by:

An Open Source Toolchain For ICE40 FPGAs

May 29, 2015 by 65 Comments

FPGAs are great, but open source they are not. All the players in FPGA land have their own proprietary tools for creating bitstream files, and synthesizing the HDL of your choice for any FPGA usually means agreeing to terms and conditions that nobody reads.

After months of work, and based on the previous work of [Clifford Wolf] and [Mathias Lasser], [Cotton Seed] has released a fully open source Verilog to bitstream development tool chain for the Lattice iCE40LP with support for more devices in the works.

Last March, we saw the reverse engineering of the Lattice ICE40 bitstream, but this is a far cry from a robust, mature development platform. Along with Yosys, also written by [Clifford Wolf] it’s relatively simple to go from Verilog to an FPGA that runs your own code.

Video demo below, and there’s a ton of documentation over on the Project IceStorm project page. You can pick up the relevant dev board for about $22 as well.

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Reverse Engineering Lattice’s ICE40 FPGA Bitstream

March 29, 2015 by 19 Comments

Unlike microcontroller projects, projects involving FPGAs cannot yet claim to rely on a mature open-source toolchain. Each FPGA will, at some point, need to be configured with a proprietary bitstream produced from a closed source synthesis tool. This lack of a full FPGA toolchain to take your project from Verilog-or-VHDL to an uploadable bitstream is due to many reasons. First, writing such a “compiler” is complicated. It involves intimate knowledge of the resources available on the FPGA that can assimilate the functionality of the intended design. Second, the entire synthesis procedure is closed-source, a “secret sauce” of sorts for each FPGA vendor.

In response, [Alex] and [Clifford] have taken the first step towards an open-source toolchain for one FPGA; they’ve reverse-engineered the bitstream of Latttice Semiconductor’s iCE40 FPGA. The duo didn’t just pick the iCE40 on a whim. This choice was deliberately because that FPGA is available on a development board for a mere $22 so that others could follow in their footsteps without breaking the bank.

In the video below, [Clifford] demos the functionality of this new tool by synthesizing a design from Verilog to a bitstream and then back from a bitstream to Verilog. Given this feature, a staggering amount of work has been done towards developing a polished open-source toolchain for this particular FGPA.

To snag a copy of the latest code, have a look at its documentation page.

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