Tang FPGA boards are affordable, and [nand2mario] has been trying to get an x86 core running on one for a while. Looks like it finally worked out, as there is an early version of the ao486 design on a Tang FPGA board using a Gowin device. That core’s available on the MiSTer platform, which emulates games using an Altera Cyclone device.
Of course, porting something substantial between FPGA architectures is not trivial. In addition, [nand2mario] made some changes. The original core uses DDR3 memory, but for the Tang and the 486, SDRAM makes more sense. The only problem is that the Tang’s SDRAM is 16 bits wide, which would imply you need two cycles per 32-bit access. To mitigate this, the memory system runs at twice the main clock frequency. Of course, that’s kind of double data rate, but not in the same way as DDR memory.